HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 605

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI has an on-chip compare match timer (CMT) comprising two 16-bit timer channels. The
CMT has 16-bit counters and can generate interrupts at specified intervals.
16.1
The CMT has the following features:
• Four kinds of counter input clock can be selected
• Interrupt sources
• Module standby mode can be set
Figure 16.1 shows a block diagram of the CMT.
TIMCMT0A_000220020700
⎯ One of four internal clocks (Pφ/8, Pφ/32, Pφ/128, Pφ/512) can be selected independently
⎯ A compare match interrupt can be requested independently for each channel.
[Legend]
CMSTR: Compare match timer start register
CMCSR: Compare match timer control/status register
CMCOR: Compare match timer constant register
CMCNT: Compare match timer counter
CMI:
for each channel.
Features
Compare match interrupt
Section 16 Compare Match Timer (CMT)
Control circuit
CMI0
Figure 16.1 CMT Block Diagram
Pφ/8
Clock selection
Module bus
Pφ/32
Pφ/128
Pφ/512
CMT
Rev.4.00 Mar. 27, 2008 Page 559 of 882
Control circuit
CMI1
16. Compare Match Timer (CMT)
Internal bus
Pφ/8
Clock selection
interface
Pφ/32
REJ09B0108-0400
Bus
Pφ/128
Pφ/512