DSPIC30F6011-30I/PF Microchip Technology, DSPIC30F6011-30I/PF Datasheet - Page 160

IC DSPIC MCU/DSP 132K 64TQFP

DSPIC30F6011-30I/PF

Manufacturer Part Number
DSPIC30F6011-30I/PF
Description
IC DSPIC MCU/DSP 132K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6011-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
132KB
Supply Voltage Range
2.5V To 5.5V
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
52
Interface Type
3-Wire/CAN/I2C/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601130IPF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6011-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F6011/6012/6013/6014
20.8
The Peripheral Module Disable (PMD) registers pro-
vide a method to disable a peripheral module by stop-
ping all clock sources supplied to that module. When a
peripheral is disabled via the appropriate PMD control
bit, the peripheral is in a minimum power consumption
state. The control and status registers associated with
the peripheral will also be disabled so writes to those
registers will have no effect and read values will be
invalid.
A peripheral module will only be enabled if both the
associated bit in the PMD register is cleared and the
peripheral is supported by the specific dsPIC DSC vari-
ant. If the peripheral is present in the device, it is
enabled in the PMD register by default.
DS70117F-page 158
Note:
Note:
Peripheral Module Disable (PMD)
Registers
If a PMD bit is set, the corresponding mod-
ule is disabled after a delay of 1 instruction
cycle. Similarly, if a PMD bit is cleared, the
corresponding module is enabled after a
delay of 1 instruction cycle (assuming the
module control registers are already
configured to enable module operation).
In the dsPIC30F6011 and dsPIC30F6013
devices, the DCIMD bit is readable and
writable, and will be read as ‘1’ when set.
20.9
When MPLAB
circuit debugging functionality is enabled. This function
allows simple debugging functions when used with
MPLAB IDE. When the device has this feature enabled,
some of the resources are not available for general
use. These resources include the first 80 bytes of Data
RAM and two I/O pins.
One of four pairs of Debug I/O pins may be selected by
the user using configuration options in MPLAB IDE.
These pin pairs are named EMUD/EMUC, EMUD1/
EMUC1, EMUD2/EMUC2 and EMUD3/EMUC3.
In each case, the selected EMUD pin is the Emulation/
Debug Data line, and the EMUC pin is the Emulation/
Debug Clock line. These pins will interface to the
MPLAB ICD 2 module available from Microchip. The
selected pair of Debug I/O pins is used by MPLAB
ICD 2 to send commands and receive responses, as
well as to send and receive data. To use the in-circuit
debugger function of the device, the design must imple-
ment ICSP connections to MCLR, V
PGD, and the selected EMUDx/EMUCx pin pair.
This gives rise to two possibilities:
1.
2.
If EMUD/EMUC is selected as the Debug I/O pin
pair, then only a 5-pin interface is required, as
the EMUD and EMUC pin functions are multi-
plexed with the PGD and PGC pin functions in
all dsPIC30F devices.
If EMUD1/EMUC1, EMUD2/EMUC2 or EMUD3/
EMUC3 is selected as the Debug I/O pin pair,
then a 7-pin interface is required, as the
EMUDx/EMUCx pin functions (x = 1, 2 or 3) are
not multiplexed with the PGD and PGC pin
functions.
In-Circuit Debugger
®
ICD2 is selected as a debugger, the in-
© 2006 Microchip Technology Inc.
DD
, V
SS
, PGC,

Related parts for DSPIC30F6011-30I/PF