DSPIC30F6011-30I/PF Microchip Technology, DSPIC30F6011-30I/PF Datasheet - Page 224

• Manufacturer Part Number: DSPIC30F6011-30I/PF
• Description: IC DSPIC MCU/DSP 132K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6011-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 132KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: 3-Wire/CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601130IPF

dsPIC30F6011A/6012A/6013A/6014A
Timing Requirements
Timing Specifications
Trap Vectors........................................................................ 48
Traps ................................................................................... 47
DS70143C-page 222
Band Gap Start-up Time ........................................... 188
Brown-out Reset ....................................................... 187
CAN Module I/O ........................................................ 205
CLKO and I/O ........................................................... 186
DCI Module
External Clock ........................................................... 183
I
I
Input Capture ............................................................ 191
Oscillator Start-up Timer ........................................... 187
Output Compare Module........................................... 191
Power-up Timer ........................................................ 187
Reset......................................................................... 187
Simple OC/PWM Mode ............................................. 192
SPI Module
Type A Timer External Clock .................................... 189
Type B Timer External Clock .................................... 190
Type C Timer External Clock .................................... 190
Watchdog Timer........................................................ 187
PLL Clock.................................................................. 184
Hard and Soft .............................................................. 48
Sources ....................................................................... 47
2
2
C Bus Data (Master Mode)..................................... 202
C Bus Data (Slave Mode)....................................... 203
AC-Link Mode ................................................... 195
Multichannel, I
Master Mode (CKE = 0) .................................... 196
Master Mode (CKE = 1) .................................... 198
Slave Mode (CKE = 0) ...................................... 199
Slave Mode (CKE = 1) ...................................... 200
Address Error Trap ............................................. 47
Math Error Trap................................................... 47
Oscillator Fail Trap.............................................. 48
Stack Error Trap.................................................. 48
2
S Modes ................................... 194
U
UART Module
UART Operation
Unit ID Locations .............................................................. 145
Universal Asynchronous Receiver Transmitter. See UART.
W
Wake-up from Sleep ......................................................... 145
Wake-up from Sleep and Idle ............................................. 49
Watchdog Timer
Watchdog Timer (WDT)............................................ 145, 156
WWW Address ................................................................. 223
WWW, On-Line Support ....................................................... 8
Address Detect Mode ............................................... 107
Auto Baud Support ................................................... 108
Baud Rate Generator ............................................... 107
Enabling and Setting Up ........................................... 105
Framing Error (FERR) .............................................. 107
Idle Status................................................................. 107
Loopback Mode ........................................................ 107
Operation During CPU Sleep and Idle Modes .......... 108
Overview................................................................... 103
Parity Error (PERR) .................................................. 107
Receive Break .......................................................... 107
Receive Buffer (UxRXB) ........................................... 106
Receive Buffer Overrun Error (OERR Bit) ................ 106
Receive Interrupt ...................................................... 106
Receiving Data ......................................................... 106
Receiving in 8-bit or 9-bit Data Mode ....................... 106
Reception Error Handling ......................................... 106
Transmit Break ......................................................... 106
Transmit Buffer (UxTXB) .......................................... 105
Transmit Interrupt ..................................................... 106
Transmitting Data ..................................................... 105
Transmitting in 8-bit Data Mode................................ 105
Transmitting in 9-bit Data Mode................................ 105
UART1 Register Map................................................ 109
UART2 Register Map................................................ 109
Idle Mode .................................................................. 108
Sleep Mode .............................................................. 108
Timing Characteristics .............................................. 187
Timing Requirements................................................ 187
Enabling and Disabling ............................................. 156
Operation .................................................................. 156
© 2006 Microchip Technology Inc.