DSPIC30F6011-30I/PF Microchip Technology, DSPIC30F6011-30I/PF Datasheet - Page 219

• Manufacturer Part Number: DSPIC30F6011-30I/PF
• Description: IC DSPIC MCU/DSP 132K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6011-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 132KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: 3-Wire/CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601130IPF

INDEX
A
A/D .................................................................................... 135
AC Characteristics ............................................................ 182
AC Temperature and Voltage Specifications .................... 182
AC-Link Mode Operation .................................................. 132
ADC
ADC Conversion Speeds .................................................. 138
Address Generator Units .................................................... 39
Alternate Vector Table ........................................................ 49
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch...................................................... 98
B
Band Gap Start-up Time
Barrel Shifter ....................................................................... 23
Bit-Reversed Addressing .................................................... 42
Block Diagrams
© 2006 Microchip Technology Inc.
Aborting a Conversion .............................................. 137
ADCHS Register ....................................................... 135
ADCON1 Register..................................................... 135
ADCON2 Register..................................................... 135
ADCON3 Register..................................................... 135
ADCSSL Register ..................................................... 135
ADPCFG Register..................................................... 135
Configuring Analog Port Pins.............................. 64, 143
Connection Considerations....................................... 143
Conversion Operation ............................................... 136
Effects of a Reset...................................................... 142
Operation During CPU Idle Mode ............................. 142
Operation During CPU Sleep Mode.......................... 142
Output Formats ......................................................... 142
Power-down Modes .................................................. 142
Programming the Sample Trigger............................. 137
Register Map............................................................. 144
Result Buffer ............................................................. 136
Sampling Requirements............................................ 141
Selecting the Conversion Sequence......................... 136
Load Conditions ........................................................ 182
16-bit Mode ............................................................... 132
20-bit Mode ............................................................... 132
Selecting the Conversion Clock ................................ 137
MPASM Assembler................................................... 170
During 10-bit Addressing (STREN = 1)....................... 98
During 7-bit Addressing (STREN = 1)......................... 98
Receive Mode ............................................................. 98
Transmit Mode ............................................................ 98
Requirements............................................................ 188
Timing Characteristics .............................................. 188
Example ...................................................................... 43
Implementation ........................................................... 42
Modifier Values Table ................................................. 43
Sequence Table (16-Entry)......................................... 43
12-bit A/D Functional ................................................ 135
16-bit Timer1 Module .................................................. 70
16-bit Timer2............................................................... 75
16-bit Timer3............................................................... 75
16-bit Timer4............................................................... 80
16-bit Timer5............................................................... 80
32-bit Timer2/3............................................................ 74
32-bit Timer4/5............................................................ 79
CAN Buffers and Protocol Engine............................. 112
DCI Module ............................................................... 126
dsPIC30F6011A/6012A/6013A/6014A
BOR Characteristics ......................................................... 181
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module ..................................................................... 111
CLKO and I/O Timing
Code Examples
Code Protection ................................................................ 145
Core Architecture
CPU Architecture Overview ................................................ 15
Customer Change Notification Service............................. 223
Customer Notification Service .......................................... 223
Customer Support............................................................. 223
Dedicated Port Structure ............................................ 63
DSP Engine ................................................................ 20
dsPIC30F6011/6012/6013/6014................................. 10
dsPIC30F6013/6014................................................... 11
External Power-on Reset Circuit .............................. 153
I
Input Capture Mode.................................................... 83
Oscillator System...................................................... 147
Output Compare Mode ............................................... 87
Reset System ........................................................... 151
Shared Port Structure................................................. 64
SPI.............................................................................. 92
SPI Master/Slave Connection..................................... 92
UART Receiver......................................................... 104
UART Transmitter..................................................... 103
Characteristics.......................................................... 180
Timing Requirements ............................................... 187
MPLAB C18.............................................................. 170
MPLAB C30.............................................................. 170
Baud Rate Setting .................................................... 116
CAN1 Register Map.................................................. 118
Frame Types ............................................................ 111
I/O Timing Characteristics ........................................ 205
I/O Timing Requirements.......................................... 205
Message Reception.................................................. 114
Message Transmission............................................. 115
Modes of Operation .................................................. 113
Overview................................................................... 111
Characteristics.......................................................... 186
Requirements ........................................................... 186
Data EEPROM Block Erase ....................................... 58
Data EEPROM Block Write ........................................ 60
Data EEPROM Read.................................................. 57
Data EEPROM Word Erase ....................................... 58
Data EEPROM Word Write ........................................ 59
Erasing a Row of Program Memory ........................... 53
Initiating a Programming Sequence ........................... 54
Loading Write Latches ................................................ 54
Overview..................................................................... 15
2
C .............................................................................. 96
DS70143C-page 217