ATTINY25-20SUR Atmel, ATTINY25-20SUR Datasheet - Page 94

• Manufacturer Part Number: ATTINY25-20SUR
• Description: MCU AVR 2KB FLASH 20MHZ 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-20SUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.3.3
94
ATtiny25/45/85
TCNT1 – Timer/Counter1
In Normal mode, the COM1B1 and COM1B0 control bits determine the output pin actions that
affect pin PB4 (OC1B) as described in
mode.
Table 12-6.
In PWM mode, these bits have different functions. Refer to
description.
• Bit 3 – FOC1B: Force Output Compare Match 1B
Writing a logical one to this bit forces a change in the compare match output pin PB3 (OC1B)
according to the values already set in COM1B1 and COM1B0. If COM1B1 and COM1B0 written
in the same cycle as FOC1B, the new settings will be used. The Force Output Compare bit can
be used to change the output pin value regardless of the timer value. The automatic action pro-
grammed in COM1B1 and COM1B0 takes place as if a compare match had occurred, but no
interrupt is generated. The FOC1B bit always reads as zero. FOC1B is not in use if PWM1B bit
is set.
• Bit 2 – FOC1A: Force Output Compare Match 1A
Writing a logical one to this bit forces a change in the compare match output pin PB1 (OC1A)
according to the values already set in COM1A1 and COM1A0. If COM1A1 and COM1A0 written
in the same cycle as FOC1A, the new settings will be used. The Force Output Compare bit can
be used to change the output pin value regardless of the timer value. The automatic action pro-
grammed in COM1A1 and COM1A0 takes place as if a compare match had occurred, but no
interrupt is generated. The FOC1A bit always reads as zero. FOC1A is not in use if PWM1A bit
is set.
• Bit 1 – PSR1 : Prescaler Reset Timer/Counter1
When this bit is set (one), the Timer/Counter prescaler (TCNT1 is unaffected) will be reset. The
bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have
no effect. This bit will always read as zero.
This 8-bit register contains the value of Timer/Counter1.
Timer/Counter1 is realized as an up counter with read and write access. Due to synchronization
of the CPU, Timer/Counter1 data written into Timer/Counter1 is delayed by one and half CPU
clock cycles in synchronous mode and at most one CPU clock cycles for asynchronous mode.
Bit
0x2F
Read/Write
Initial value
COM1B1
0
0
1
1
Comparator B Mode Select
COM1B0
MSB
R/W
7
0
0
1
0
1
R/W
6
0
Description
Timer/Counter Comparator B disconnected from output pin OC1B.
Toggle the OC1B output line.
Clear the OC1B output line.
Set the OC1B output line
R/W
5
0
Table
R/W
4
0
12-6. Note that OC1B is not connected in normal
R/W
3
0
Table 12-1 on page 89
R/W
2
0
R/W
1
0
LSB
R/W
0
0
2586M–AVR–07/10
for a detailed
TCNT1