ATMEGA64M1-AU Atmel, ATMEGA64M1-AU Datasheet - Page 132

• Manufacturer Part Number: ATMEGA64M1-AU
• Description: IC MCU AVR 64K FLASH 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

16.4
16.4.1
132
Register Description
ATmega16M1/32M1/64M1
GTCCR – General Timer/Counter Control Register
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSRSYNC bit is kept, hence keeping the corresponding prescaler
reset signals asserted. This ensures that the corresponding Timer/Counters are halted and can
be configured to the same value without the risk of one of them advancing during configuration.
When the TSM bit is written to zero, the PSRSYNC bit is cleared by hardware, and the
Timer/Counters start counting simultaneously.
• Bit6 – ICPSEL1: Timer 1 Input Capture selection
Timer 1 capture function has two possible inputs ICP1A (PD4) and ICP1B (PC3). The selection
is made thanks to ICPSEL1 bit as described in
Table 16-1.
• Bit 0 – PSRSYNC: Prescaler Reset
When this bit is one, Timer/Counter1 and Timer/Counter0 prescaler will be Reset. This bit is nor-
mally cleared immediately by hardware, except if the TSM bit is set. Note that Timer/Counter1
and Timer/Counter0 share the same prescaler and a reset of this prescaler will affect both
timers.
Bit
Read/Write
Initial Value
0
1
ICPSEL1
TSM
R/W
ICPSEL1
7
0
Description
Select ICP1A as trigger for timer 1 input capture
Select ICP1B as trigger for timer 1 input capture
ICPSEL1
R/W
6
0
5
–
R
0
R
4
–
0
Table
R
3
–
0
16-1.
R
2
–
0
R
1
–
0
PSRSYNC
R/W
0
0
8209D–AVR–11/10
GTCCR