ATMEGA64M1-AU Atmel, ATMEGA64M1-AU Datasheet - Page 279

IC MCU AVR 64K FLASH 32TQFP

ATMEGA64M1-AU

Manufacturer Part Number
ATMEGA64M1-AU
Description
IC MCU AVR 64K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64M1-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details

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Part Number:
ATMEGA64M1-AU
Manufacturer:
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Quantity:
10 000
26.7.10
26.7.11
8209D–AVR–11/10
Reading the Signature Row from Software
Preventing Flash Corruption
the value of the Fuse High byte (FHB) will be loaded in the destination register as shown below.
Refer to
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction
is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown below.
Refer to
byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
To read the Signature Row from software, load the Z-pointer with the signature byte address
given in
is executed within three CPU cycles after the SIGRD and SPMEN bits are set in SPMCSR, the
signature byte value will be loaded in the destination register. The SIGRD and SPMEN bits will
auto-clear upon completion of reading the Signature Row Lock bits or if no LPM instruction is
executed within three CPU cycles. When SIGRD and SPMEN are cleared, LPM will work as
described in the Instruction set Manual.
Table 26-5.
Note:
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Bit
Rd
Bit
Rd
Signature Byte
Device Signature Byte 1
Device Signature Byte 2
Device Signature Byte 3
RC Oscillator Calibration Byte
TSOFFSET Temp Sensor Offset
TSGAIN Temp Sensor Gain
All other addresses are reserved for future use.
Table 26-5
Table 27-6 on page 290
Table 27-4 on page 288
Signature Row Addressing
FHB7
7
7
and set the SIGRD and SPMEN bits in SPMCSR. When an LPM instruction
CC
FHB6
, the Flash program can be corrupted because the supply voltage is
6
6
for detailed description and mapping of the Fuse High byte.
FHB5
for detailed description and mapping of the Extended Fuse
5
5
FHB4
4
4
ATmega16M1/32M1/64M1
FHB3
EFB3
3
3
FHB2
EFB2
2
2
FHB1
EFB1
Z-Pointer Address
1
1
0x0000
0x0002
0x0004
0x0001
0x0003
0x0005
FHB0
EFB0
0
0
279

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