ATMEGA64M1-AU Atmel, ATMEGA64M1-AU Datasheet - Page 200

IC MCU AVR 64K FLASH 32TQFP

ATMEGA64M1-AU

Manufacturer Part Number
ATMEGA64M1-AU
Description
IC MCU AVR 64K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64M1-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Quantity
Price
Part Number:
ATMEGA64M1-AU
Manufacturer:
Atmel
Quantity:
10 000
20.3.3
20.3.4
20.3.5
20.4
20.4.1
200
LIN / UART Controller
ATmega16M1/32M1/64M1
Data Transport
Schedule Table
Compatibility with LIN 1.3
LIN Overview
Two types of data may be transported in a frame; signals or diagnostic messages.
The master task (in the master node) transmits frame headers based on a schedule table. The
schedule table specifies the identifiers for each header and the interval between the start of a
frame and the start of the following frame. The master application may use different schedule
tables and select among them.
LIN 2.1 is a super-set of LIN 1.3.
A LIN 2.1 master node can handle clusters consisting of both LIN 1.3 slaves and/or LIN 2.1
slaves. The master will then avoid requesting the new LIN 2.1 features from a LIN 1.3 slave:
LIN 2.1 slave nodes can not operate with a LIN 1.3 master node (for example the LIN1.3 master
does not support the enhanced checksum).
The LIN 2.1 physical layer is backwards compatible with the LIN1.3 physical layer. But not the
other way around. The LIN 2.1 physical layer sets greater requirements, that is, a master node
using the LIN 2.1 physical layer can operate in a LIN 1.3 cluster.
The LIN/UART controller is divided in three main functions:
These functions mainly use two services:
Because these two services are basically UART services, the controller is also able to switch
into an UART function.
The LIN/UART controller is designed to match as closely as possible to the LIN software appli-
cation structure. The LIN software application is developed as independent tasks, several slave
• Signals
• Diagnostic messages
• Enhanced checksum
• Re-configuration and diagnostics
• Automatic baud rate detection
• "Response error" status monitoring
• Tx LIN Header function
• Rx LIN Header function
• LIN Response function
• Rx service
• Tx service
Signals are scalar values or byte arrays that are packed into the data field of a frame. A signal
is always present at the same position in the data field for all frames with the same identifier.
Diagnostic messages are transported in frames with two reserved identifiers. The
interpretation of the data field depends on the data field itself as well as the state of the
communicating nodes.
8209D–AVR–11/10

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