AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 1001

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 41-16. DMAC Transfer Flow for Linked List Source Address and Contiguous Destination Address
41.4.6
6438F–ATARM–21-Jun-10
Disabling a Channel Prior to Transfer Completion
Under normal operation, software enables a channel by writing a ‘1’ to the Channel Handler
Enable Register, DMAC_CHER.ENABLE[n], and hardware disables a channel on transfer com-
pletion by clearing the DMAC_CHSR.ENABLE[n] register bit.
The recommended way for software to disable a channel without losing data is to use the SUS-
PEND[n] bit in conjunction with the EMPTY[n] bit in the Channel Handler Status Register.
Buffer Complete interrupt
HDMA Transfer Complete
interrupt generated here
generated here
SADDRx, CTRLAx,CTRLBx, DSCRx
Hardware reprograms
HDMA buffer transfer
Channel Enabled by
Writeback of control
Channel Disabled by
information of LLI
Is HDMA in
LLI Fetch
Row 1 ?
software
hardware
yes
no
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