AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 59
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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11.3
11.3.1
11.3.2
6438F–ATARM–21-Jun-10
Device Initialization
Clock at Start Up
Initialization Sequence
At boot start up, the processor clock (PCK) and the master clock (MCK) are found on the slow
clock. The slow clock can be an external 32 kHz crystal oscillator or the internal RC oscillator. By
default the slow clock is the internal RC oscillator. Its frequency is not precise and is between 20
kHz and 40 kHz. Its start up is much faster than an external 32 kHz quartz. If a battery supplies
the backup power and if the external 32 kHz clock was previously started up and selected, the
slow clock at boot is the external 32 kHz quartz oscillator. Refer to the Slow Clock Crystal Oscil-
lator description in the Clock Generator section of the datasheet.
Initialization follows the steps described below:
1. Stack setup for ARM supervisor mode.
2. Main Oscillator Detection: (External crystal or external clock on XIN). The Main Oscil-
3. Main Oscillator Enabling: if an external clock is connected on XIN, the Main Oscillator
4. Main Oscillator Selection: the Master Clock source is switched from Slow Clock to the
5. C variable initialization: non zero-initialized data are initialized in RAM (copy from
6. PLLA initialization: PLLA is configured to allow communication on the USB link for the
lator is disabled at startup (MOSCEN = 0). First it is bypassed (OSCBYPASS set at 1).
Then the MAINRDY bit is polled. Since this bit is raised, the Main Clock Frequency field
is analyzed (MAINF). If the value is bigger than 16, an external clock connected on XIN
is detected. If not, an external quartz connected between XIN and XOUT (whose fre-
quency is unknown at this moment) is detected.
does not need to be started. Otherwise, the OSCBYPASS bit is not set. The Main Oscil-
lator is enabled (MOSCEN = 1) with the maximum start-up time and the MOSC bit is
polled to wait for stabilization.
Main Oscillator without prescaler. The PMC Status Register is polled to wait for MCK
Ready. PCK and MCK are now the Main Oscillator clock.
ROM to RAM). Zero-initialized data are set to 0 in RAM.
SAM-BA Monitor. Its configuration depends on the Main Oscillator source (external
clock or crystal) and on its frequency.
AT91SAM9G45
59
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