AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 997

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 41-13. Multi-buffer Transfer with Source Address Auto-reloaded and Contiguous Destination Address
6438F–ATARM–21-Jun-10
Address of
Source Layer
The transfer is similar to that shown in
The DMAC Transfer flow is shown in
b. If the buffer complete interrupt is masked (DMAC_EBCIMR.BTC[x] = ‘1’, where x is
SADDR
automatic transfer mode bit should remain enabled to keep the DMAC in Row 11 as
shown in
the channel number) then hardware does not stall until it detects a write to the buf-
fer transfer completed interrupt enable register but starts the next buffer transfer
immediately. In this case software must clear the automatic mode bit,
DMAC_CTRLBx.AUTO, to put the device into ROW 1 of
before the last buffer of the DMAC transfer has completed.
Source Buffers
Table 41-2 on page
Figure 41-14 on page
Buffer0
Buffer2
Buffer1
Figure 41-13 on page
982.
Destination Buffers
DADDR(0)
DADDR(1)
DADDR(2)
Destination Layer
998.
Address of
997.
Table 41-2 on page 982
AT91SAM9G45
997