AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 766

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

36.8.1
6438F–ATARM–21-Jun-10
Command - Response Operation
Both read and write operations allow either single or multiple block transmission. A multiple
block transmission is terminated when a stop command follows on the CMD line similarly to the
sequential read or when a multiple block transmission has a pre-defined block count
Transfer Operation” on page
The HSMCI provides a set of registers to perform the entire range of High Speed MultiMedia
Card operations.
After reset, the HSMCI is disabled and becomes valid after setting the MCIEN bit in the
HSMCI_CR Control Register.
The PWSEN bit saves power by dividing the HSMCI clock by 2
inactive.
The two bits, RDPROOF and WRPROOF in the HSMCI Mode Register (HSMCI_MR) allow
stopping the HSMCI Clock during read or write access if the internal FIFO is full. This will guar-
antee data integrity, not bandwidth.
All the timings for High Speed MultiMedia Card are defined in the High Speed MultiMediaCard
System Specification.
The two bus modes (open drain and push/pull) needed to process all the operations are defined
in the HSMCI command register. The HSMCI_CMDR allows a command to be carried out.
For example, to perform an ALL_SEND_CID command:
The command ALL_SEND_CID and the fields and values for the HSMCI_CMDR Control Regis-
ter are described in
Table 36-6.
Note:
Table 36-7.
CMD
CMD Index
CMD2
Field
CMDNB (command number)
RSPTYP (response type)
SPCMD (special command)
OPCMD (open drain command)
MAXLAT (max latency for command to response)
• Block-oriented commands: These commands send a data block succeeded by CRC bits.
bcr means broadcast command with response.
S
T
ALL_SEND_CID Command Description
Fields and Values for HSMCI_CMDR Command Register
Type
bcr
Host Command
Content
Table 36-6
Argument
[31:0] stuff bits
768.).
CRC
and
Table
E
Z
36-7.
N
Resp
R2
ID
******
Cycles
Value
2 (CMD2)
2 (R2: 136 bits response)
0 (not a special command)
1
0 (NID cycles ==> 5 cycles)
Abbreviation
ALL_SEND_CID
Z
S
T
AT91SAM9G45
PWSDIV
Content
CID
Command
Description
Asks all cards to send
their CID numbers on
the CMD line
+ 1 when the bus is
Z
(See “Data
Z
766
Z