EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 331

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

Transmit Descriptor Format - Second Word
DS785UM1
EOF
AF
31
15
Bit Descriptions:
Definition:
Bit Descriptions:
30
14
RSVD
29
13
28
12
TBA:
Transmit Descriptor, second word. Contains control, index and length for the
descriptor.
EOF:
TBI:
AF:
RSVD:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Transmit Buffer Address. The transmit buffer address
contains the 32 bit address pointer to the transmit buffer.
The base address of the data buffer must be word-aligned
(32-bit aligned).
End of Frame. When this bit is set, the descriptor
terminates a transmit frame. When clear, the descriptor is
not the end of frame and a future descriptor will provide
the EOF.
Transmit Buffer Index. The transmit buffer index is
provided to help the Host software keep track of the
transmit buffers. A copy of the index for the first buffer of a
frame is kept in the MAC, and is included in any status
written for the particular frame.
Abort Frame. When the Abort Frame and EOF bits are set
in a descriptor, the transmit frame will be terminated with a
bad CRC. A bad CRC is applied even when the
InhibitCRC bit (TXCtl) is set. The Abort Frame bit is
ignored in a descriptor which does not have the EOF bit
set. The abort feature is useful in a forwarding
environment, where the integrity of the incoming frame is
not known before the outgoing frame is started. If the
incoming frame is received with error, the outgoing frame
can be then invalidated. The AF bit is the only valid bit in
the CMD field.
Reserved. Unknown During Read.
24
8
TBI
23
7
22
6
TBL
21
1/10/100 Mbps Ethernet LAN Controller
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
9-29
0
9