EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 594

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

16
UART3HDLCSts
16-18
UART3 With HDLC Encoder
EP93xx User’s Guide
RSVD
31
15
Address:
Default:
Definition:
Bit Descriptions:
CRE
Note: This bit reflects the status associated with the last character read from the RX FIFO. It
Note: This bit reflects the status associated with the last character read from the RX FIFO. It
30
14
changes with reads from the RX FIFO.
changes with reads from the RX FIFO.
ROR
29
13
TBY
28
12
0x808E_021C - Read/Write
0x0000_0000
HDLC Status Register. The TFS and RFS bits in this register are replicas of
bits in the UART3 status register.
RSVD:
CRE:
ROR:
TBY:
RIF:
RIF
27
11
RSVD
26
10
Copyright 2007 Cirrus Logic
RAB
25
9
Reserved. Unknown During Read.
CRC Error. (Read Only)
0 - No CRC check errors encountered in incoming frame.
1 - CRC calculated on the incoming data does not match
CRC value contained within the received frame. This bit is
set with the last data in the incoming frame along with
EOF.
Receive FIFO Overrun. (Read Only)
0 - RX FIFO has not overrun.
1 - RX logic attempted to place data in the RX FIFO while
it was full. The most recently read data is the last valid
data before the overrun. The rest of the incoming frame is
dropped. EOF is also set.
Transmitter Busy. (Read Only)
0 - TX is idle, disabled, or transmitting an abort.
1 - TX is currently sending a frame (address, control, data,
CRC or start/stop flag).
Receiver In Frame. (Read Only)
0 - RX is idle, disabled or receiving start flags
1 - RX is receiving a frame.
RTO
24
8
RSVD
EOF
23
7
RFL
22
6
RIL
21
5
RFC
20
4
RFS
19
3
TAB
18
2
TFC
17
1
DS785UM1
TFS
16
0