EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 518

IC ARM9 SOC UNIVERSAL 352PBGA

EP9312-CBZ

Manufacturer Part Number
EP9312-CBZ
Description
IC ARM9 SOC UNIVERSAL 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
2
Digital Ic Case Style
BGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1258

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
13
SDRAMDevCfg[3:0]
13-22
SDRAM, SyncROM, and SyncFLASH Controller
EP93xx User’s Guide
31
15
Address:
Default:
If booting from Asynchronous ROM, asynchronous memory bank zero (nCS0) is mapped to
address 0x0000_0000. If booting from SyncROM or SyncFLASH, Synchronous Memory
Domain 3 (nSDCS3) is re-mapped to address 0x0000_0000. This re-mapping of nSDCS3
does not change until after the boot process is completed and the processor is reset (not
power-on reset). At that time, nSDCS3 is mapped back to address 0xF000_0000, the
beginning address of Synchronous Memory Domain 3.
30
14
Note: 8-bit wide bus is not supported for SyncROM or SyncFLASH.
29
13
RSVD
28
12
RSVD
SDRAMDevCfg0: 0x8006_0010 - Read/Write
SDRAMDevCfg1: 0x8006_0014 - Read/Write
SDRAMDevCfg2: 0x8006_0018 - Read/Write
SDRAMDevCfg3: 0x8006_001C - Read/Write
0x0122_0008
27
11
26
10
25
9
Copyright 2007 Cirrus Logic
Precharge
Auto
24
Latched nCS[7:6] pins values:
Asynchronous (ASDO = ‘0’)
11 - 32-bit
10 - 32-bit
01 - 16-bit
00 - 8-bit
Synchronous (ASDO = ‘1’)
11 - 32-bit SROM (RAS=2, CAS=5, BL=4)
10 - 32-bit SFLASH (WBM=1, CAS=3, BL=4)
01 - 16-bit SROM (RAS=2, CAS=5, BL=8)
00 - 16-bit SFLASH (WBM=1, CAS=3, BL=4)
8
SFConfig
Addr
23
7
RSVD
PAGE
2K
22
6
SROMLL
21
5
RasToCas
SROM512
20
4
Count
WBM
Bank
19
3
External
Width
Bus
18
2
CasLat
DS785UM1
17
1
RSVD
16
0

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