EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 92

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

3
3-22
MaverickCrunch Co-Processor
EP93xx User’s Guide
31:28
cond
Bit Definitions:
Description:
Bit Definitions:
Description:
31:28
27:25
cond
1 1 0
CFLDR32<cond> CRd, [Rn, <offset>]{!}
CFLDR64<cond> CRd, [Rn, <offset>]{!}
CFLDR32<cond> CRd, [Rn], <offset>
CFLDR64<cond> CRd, [Rn], <offset>
Loading Integer Value from Memory
Store Floating Point Values to Memory
27:25
Table 3-12. Mnemonic Codes for Loading Integer Value from Memory
24
1 1 0
P
N:
Rn:
CRd:
Loads a 32- or 64-bit integer from memory into a MaverickCrunch register.
N:
Rn:
CRd:
Stores a single or double precision floating point value from a MaverickCrunch
register into memory.
23
U
Mnemonic
24
P
22
N
23
U
21
W
22
Copyright 2007 Cirrus Logic
N
20
Floating point precision - 0 for single, 1 for double.
Base register in ARM
Destination register.
Integer width - 0 for 32-bit integer, 1 for 64-bit integer
Base register in ARM
Destination register.
0
21
W
19:16
20
1
Rn
19:16
Rn
15:12
CRd
Immediate post-indexed
Immediate post-indexed
15:12
Immediate pre-indexed
Immediate pre-indexed
CRd
Addressing Mode
0 1 0 0
11:8
0 1 0 1
11:8
8_bit_word_offset
8_bit_word_offset
7:0
7:0
N
0
0
1
1
DS785UM1