EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 707

IC ARM9 SOC UNIVERSAL 352PBGA

EP9312-CBZ

Manufacturer Part Number
EP9312-CBZ
Description
IC ARM9 SOC UNIVERSAL 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
2
Digital Ic Case Style
BGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1258

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
AC97GIS
DS785UM1
31
15
Address:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x8088_0090 - Read Only
Global Interrupt Status. The AC97GIS register is the global interrupt status
register. All bits are cleared to zero on reset. Each bit is the logical AND of the
corresponding bits in the AC97RGIS register and the AC97IM register.
RSVD:
SLOT2TXCOMPLETE:If this bit is set to “1”, the SLOT2TXCOMPLETE
CODECREADY:
WINT:
GPIOINT:
GPIOTXCOMPLETE:If this bit is set to “1”, the GPIOTXCOMPLETE interrupt
SLOT2RXVALID: If this bit is set to “1”, SLOT2RXVALID interrupt is
SLOT1TXCOMPLETE:If this bit is set to “1”, SLOT1TXCOMPLETE interrupt is
RSVD
27
11
26
10
25
9
Copyright 2007 Cirrus Logic
Reserved. Unknown During Read.
This bit is set to “1” during a wakeup when the codec
Wake-up Interrupt Status: If this bit is set to “1”, the Wake-
GPIO Interrupt Status: If this bit is set to “1”, the GPIOINT
24
8
interrupt is asserted.
indicates that it is ready by setting bit 15 of Slot0
up Interrupt is asserted.
interrupt is asserted.
is asserted.
asserted.
asserted.
23
7
RSVD
COMPLETE
SLOT2TX
22
6
CODEC
READY
21
5
WINT
20
4
GPIO
INT
19
3
COMPLETE
GPIOTX
18
EP93xx User’s Guide
2
AC’97 Controller
SLOT2R
XVALID
17
1
COMPLETE
SLOT1TX
16
22-19
0
22

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