EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 56

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

2
2-18
0x8000_0140 - 0x8000_017C
0x8000_0180 - 0x8000_01FC
0x8000_0200 - 0x8000_023C
0x8000_0240 - 0x8000_027C
0x8000_0280 - 0x8000_02BC
0x8000_02C0 - 0x8000_02FC M2P Channel 6 Registers (Tx)
0x8000_0300 - 0x8000_033C
0x8000_0340 - 0x8000_037C
0x8000_0380
0x8000_03C0
0x8000_03C4 - 0x8000_FFFC
0x8001_xxxx
0x8001_0000
0x8001_0004
0x8001_0008
0x8001_0010
0x8001_0014
0x8001_0018
0x8001_0020
0x8001_0024
0x8001_0028
0x8001_002C
0x8001_0030 - 0x8001_0034
0x8001_0038
0x8001_003C
0x8001_0040
0x8001_0044
0x8001_0048
0x8001_004C
0x8001_0050 - 0x8001_0055
0x8001_0050 - 0x8001_0057
0x8001_0060
0x8001_0064
0x8001_0068
0x8001_006C
0x8001_0070
0x8001_0074
0x8001_0078
0x8001_0080
0x8001_0084
0x8001_0088
ARM920T Core and Advanced High-Speed Bus (AHB)
EP93xx User’s Guide
Address
M2M Channel 1 Registers
M2P Channel 5 Registers (Rx) Memory-to-Peripheral Channel 5 Registers (Rx)
M2P Channel 4 Registers (Tx)
M2P Channel 7 Registers (Rx) Memory-to-Peripheral Channel 7 Registers (Rx)
M2P Channel 9 Registers (Rx) Memory-to-Peripheral Channel 9 Registers (Rx)
M2P Channel 8 Registers (Tx)
DMAChArb
DMAGlInt
RXCtl
TXCtl
TestCtl
MIICmd
MIIData
MIISts
SelfCtl
IntEn
IntStsP
IntStsC
DiagAd
DiagDa
GT
FCT
FCF
AFP
IndAd
HashTbl
GlIntSts
GlIntMsk
GlIntROSts
GlIntFrc
TXCollCnt
RXMissCnt
RXRuntCnt
BMCtl
BMSts
RXBCA
Register Name
Ethernet MAC
Table 2-8. Internal Register Map (Continued)
Copyright 2007 Cirrus Logic
Memory-to-Memory Channel 1 Registers
Reserved
Memory-to-Peripheral Channel 4 Registers (Tx)
Memory-to-Peripheral Channel 6 Registers (Tx)
Memory-to-Peripheral Channel 8 Registers (Tx)
DMA Channel Arbitration Register
DMA Global Interrupt Register
Reserved
MAC Receiver Control Register
MAC Transmitter Control Register
MAC Test Control Register
MAC MII Command Register
MAC MII Data Register
MAC MII Status Register
MAC Self Control Register
MAC Interrupt Enable Register
MAC Interrupt Status Preserve Register
MAC Interrupt Status Clear Register
Reserved
MAC Diagnostic Address Register
MAC Diagnostic Data Register
MAC General Timer Register
MAC Flow Control Timer Register
MAC Flow Control Format Register
MAC Address Filter Pointer Register
MAC Individual Address Register, (shares address space with
HashTbl)
MAC Hash Table Register, (shares address space with IndAd)
MAC Global Interrupt Status Register
MAC Global Interrupt Mask Register
MAC Global Interrupt Read Only Status Register
MAC Global Interrupt Force Register
MAC Transmit Collision Count Register
MAC Receive Miss Count Register
MAC Receive Runt Count Register
MAC Bus Master Control Register
MAC Bus Master Status Register
MAC Receive Buffer Current Address Register
Ethernet MAC Control Registers
Register Description
DS785UM1
Lock
SW
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N