EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 467

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

HcLSThreshold
DS785UM1
31
15
Default:
Definition:
Bit Description:
Address:
Default:
Definition:
Bit Description:
30
14
RSVD
29
13
28
12
0x8002_0040
0x0000_0000
Defines the earliest time the host controller should start processing the
periodic list.
RSVD:
PS:
0x8002_0044
0x0000_0628
Contains a value used by the host controller to determine whether to commit
to the transfer of a maximum 8-byte LS packet before EOF.
RSVD:
LST:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
PeriodicStart. After a hardware reset, this field is cleared.
This is then set by HCD during the HC initialization. The
value is calculated roughly as 10% off from HcFmInterval.
A typical value will be 0x03E67. When HcFmRemaining
reaches the value specified, processing of the periodic
lists will have priority over Control/Bulk processing. HC will
therefore start processing the Interrupt list after completing
the current Control or Bulk transaction that is in progress.
Reserved. Unknown During Read.
LSThreshold. This field contains a value which is
compared to the FrameRemaining field prior to initiating a
Low Speed transaction. The transaction is started only if
FrameRemaining >= this field. The value is calculated by
HCD with the consideration of transmission and setup
overhead.
24
8
RSVD
23
7
22
6
LST
21
5
Universal Serial Bus Host Controller
20
4
19
3
EP93xx User’s Guide
18
2
17
1
11-27
16
0
11