DF36912GFH Renesas Electronics America, DF36912GFH Datasheet - Page 249
DF36912GFH
Manufacturer Part Number
DF36912GFH
Description
MCU 3/5V 8K 32-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36912GFHV.pdf
(442 pages)
Specifications of DF36912GFH
Core Processor
H8/300H
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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14.5
Figure 14.10 shows the general format for clocked synchronous communication. In clocked
synchronous mode, data is transmitted or received synchronous with clock pulses. A single
character in the transmit data consists of the 8-bit data starting from the LSB. In clocked
synchronous serial communication, data on the transmission line is output from one falling edge of
the synchronization clock to the next. In clocked synchronous mode, SCI3 receives data in
synchronous with the rising edge of the synchronization clock. After 8-bit data is output, the
transmission line holds the MSB state. In clocked synchronous mode, no parity or multiprocessor
bit is added. Inside the SCI3, the transmitter and receiver are independent units, enabling full-
duplex communication through the use of a common clock. Both the transmitter and the receiver
also have a double-buffered structure, so data can be read or written during transmission or
reception, enabling continuous data transfer.
14.5.1
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK3 pin can be selected, according to the setting of the COM
bit in SMR and CKE0 and CKE1 bits in SCR3. When SCI3 is operated on an internal clock, the
synchronization clock is output from the SCK3 pin. Eight synchronization clock pulses are output
in the transfer of one character, and when no transfer is performed the clock is fixed high.
Operation in Clocked Synchronous Mode
Clock
Synchronization
clock
Serial data
Note: * High except in continuous transfer
Figure 14.10 Data Format in Clocked Synchronous Communication
Don’t care
*
LSB
Bit 0
One unit of transfer data (character or frame)
Bit 1
Bit 2
Bit 3
Section 14 Serial Communication Interface 3 (SCI3)
8-bit
Bit 4
Rev. 3.00 Sep. 14, 2006 Page 219 of 408
Bit 5
Bit 6
MSB
Bit 7
Don’t care
REJ09B0105-0300
*
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