DF36912GFH Renesas Electronics America, DF36912GFH Datasheet - Page 265

MCU 3/5V 8K 32-LQFP

DF36912GFH

Manufacturer Part Number
DF36912GFH
Description
MCU 3/5V 8K 32-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36912GFH

Core Processor
H8/300H
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF36912GFH
Manufacturer:
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Quantity:
10 000
Part Number:
DF36912GFHV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.7
SCI3 creates the following six interrupt requests: transmission end, transmit data empty, receive
data full, and receive errors (overrun error, framing error, and parity error). Table 14.6 shows the
interrupt sources.
Table 14.6 SCI3 Interrupt Requests
The initial value of the TDRE flag in SSR is 1. Thus, when the TIE bit in SCR3 is set to 1 before
transferring the transmit data to TDR, a TXI interrupt request is generated even if the transmit data
is not ready. The initial value of the TEND flag in SSR is 1. Thus, when the TEIE bit in SCR3 is
set to 1 before transferring the transmit data to TDR, a TEI interrupt request is generated even if
the transmit data has not been sent. It is possible to make use of the most of these interrupt
requests efficiently by transferring the transmit data to TDR in the interrupt routine. To prevent
the generation of these interrupt requests (TXI and TEI), set the enable bits (TIE and TEIE) that
correspond to these interrupt requests to 1, after transferring the transmit data to TDR.
Interrupt Requests
Receive Data Full
Transmit Data Empty
Transmission End
Receive Error
Interrupts
Abbreviation
RXI
TXI
TEI
ERI
Interrupt Sources
Setting RDRF in SSR
Setting TDRE in SSR
Setting TEND in SSR
Setting OER, FER, and PER in SSR
Section 14 Serial Communication Interface 3 (SCI3)
Rev. 3.00 Sep. 14, 2006 Page 235 of 408
REJ09B0105-0300

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