R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 415

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
Figure 7.27 shows a transfer example in which TEND output is enabled and word-size single
address mode transfer (read) is performed from external 8-bit, 2-state access space to an external
device.
A byte or word transfer is performed for a single transfer request, and after the transfer, the bus is
released. While the bus is released, one or more bus cycles are executed by the CPU or DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Address bus
DACK
TEND
RD
φ
Figure 7.27 Example of Single Address Mode (Word Read) Transfer
release
Bus
DMA read
release
Bus
DMA read
release
Bus
Section 7 DMA Controller (DMAC)
DMA read
Last transfer
cycle
Page 385 of 1372
DMA
dead
release
Bus