R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 513

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
9.3
The DTC operates when activated by an interrupt or by a write to DTVECR or DTCCR by
software. An interrupt request can be directed to the CPU or DTC, as designated by the
corresponding DTCER bit. At the end of a data transfer (or the last consecutive transfer in the case
of chain transfer), the activation source or corresponding DTCER bit is cleared. The activation
source flag, in the case of RXI0, for example, is the RDRF flag of SCI_0.
When an interrupt has been designated a DTC activation source, existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.
Table 9.1 shows a relationship between activation sources and DTCER clear conditions. Figure
9.2 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Table 9.1
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Activation Source
Activation by software
Activation by an interrupt
Activation Sources
Relationship between Activation Sources and DTCER Clearing
DISEL = 0 and Specified
Number of Transfers Has
Not Ended
SWDTE bit is cleared to 0
•
•
Corresponding DTCER bit
remains set to 1.
Activation source flag is
cleared to 0.
DISEL = 1 or Specified Number
of Transfers Has Ended
•
•
•
•
•
Section 9 Data Transfer Controller (DTC)
SWDTE bit remains set to 1
Interrupt request to CPU
Corresponding DTCER bit is
cleared to 0.
Activation source flag remains
set to 1.
Interrupt that became the
activation source is requested
to the CPU.
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