R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 707

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
10.15.5 Pin Functions
Port G pins also function as the pins for bus control signal I/Os. The correspondence between the
register specification and the pin functions is shown below.
• PG6/BREQ-A
• PG5/BACK-A
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Operating
mode
EXPE
BRLE
BREQS
PG6DDR
Pin
function
Operating
mode
EXPE
BRLE
BACKS
PG5DDR
Pin
function
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bit BRLE in BCR of the bus controller, bit BREQS in PFCR4, and bit
PG6DDR.
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bit BRLE in BCR of the bus controller, bit BACKS in PFCR4, and bit
PG5DDR.
input
input
PG6
BRLE = 1 and
PG5
BRLE = 1 and
BRLE = 0 or
BRLE = 0 or
BREQS = 1
BACKS = 1
0
0
output
output
PG5
PG6
1, 2, 4
1, 2, 4
1
1
BREQS = 0
BACKS = 0
BRLE = 1
BRLE = 1
BACK-A
BREQ-A
output
input
and
and
input
input
PG6
PG5
0
0
0
0
output
output
PG5
PG6
1
1
input
PG5
input
BRLE = 1 and
PG6
BRLE = 1 and
BRLE = 0 or
BRLE = 0 or
BACKS = 1
0
BREQS = 1
0
7
7
output
output
PG5
PG6
1
1
1
1
Section 10 I/O Ports
Page 677 of 1372
BACKS = 0
BREQS = 0
BRLE = 1
BRLE = 1
BACK-A
BREQ-A
output
input
and
and

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