R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 980

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
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Part Number:
R4F24269NVFQV
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Renesas Electronics America
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Section 15 Serial Communication Interface (SCI, IrDA)
15.10.7 Operation in Case of Mode Transition
• Transmission
• Reception
Page 950 of 1372
Operation should be stopped (by clearing TE, TIE, and TEIE to 0) before setting the module
stop state or making a transition to software standby mode. TSR, TDR, and SSR are reset. The
output pin states in the module stop state or software standby mode depend on the port
settings, and become high-level output after the relevant mode is cleared. If a transition is
made during transmission, the data being transmitted will be undefined.
When transmitting without changing the transmit mode after the relevant mode is cleared,
transmission can be started by setting TE to 1 again, and performing the following sequence:
SSR read → TDR write → TDRE clearance. To transmit with a different transmit mode after
clearing the relevant mode, the procedure must be started again from initialization.
Figure 15.36 shows a sample flowchart for mode transition during transmission. Port pin states
during mode transition are shown in figures 15.37 and 15.38.
Operation should also be stopped (by clearing TE, TIE, and TEIE to 0) before making a
transition from transmission by DTC transfer to module stop state setting or software standby
mode transition. To perform transmission with the DTC after the relevant mode is cleared,
setting TE and TIE to 1 will set the TXI flag and start DTC transmission.
Receive operation should be stopped (by clearing RE to 0) before setting the module stop state
or making a transition to software standby mode. RSR, RDR, and SSR are reset. If a transition
is made during reception, the data being received will be invalid.
To continue receiving without changing the reception mode after the relevant mode is cleared,
set RE to 1 before starting reception. To receive with a different receive mode, the procedure
must be started again from initialization.
Figure 15.39 shows a sample flowchart for mode transition during reception.
H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010

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