R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 640

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 I/O Ports
10.9.2
PADR stores output data for the port A pins.
10.9.3
PORTA shows the pin states of port A. PORTA cannot be modified.
Note:
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Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
PA7DR
PA6DR
PA5DR
PA4DR
PA3DR
PA2DR
PA1DR
PA0DR
Bit Name
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
*
Port A Data Register (PADR)
Port A Register (PORTA)
Determined by the states of pins PA7 to PA0.
Initial Value
0
0
0
0
0
0
0
0
Initial Value
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
Description
Output data for a pin is stored when the pin function
is specified as a general purpose I/O.
Description
If this register is read while a PADDR bit is set to 1,
the corresponding PADR value is read. If this
register is read while a PADDR bit is cleared to 0,
the corresponding pin state is read.
H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010