HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 377

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Bits 6 and 5—Counter Clear 1/0 (CCLR1, CCLR0): These bits select how TCNT is cleared.
Bit 6
CCLR1
0
1
Notes: 1. TCNT is cleared by compare match when the general register functions as an output
Bits 4 and 3—Clock Edge 1/0 (CKEG1, CKEG0): These bits select external clock input edges
when an external clock source is used.
Bit 4
CKEG1
0
1
When channel 2 is set to phase counting mode, bits CKEG1 and CKEG0 in TCR2 are ignored.
Phase counting takes precedence.
2. Selected in TSNC.
Bit 5
CCLR0
0
1
0
1
Bit 3
CKEG0
0
1
compare register, and by input capture when the general register functions as an input
capture register.
Description
TCNT is not cleared
TCNT is cleared by GRA compare match or input capture *
TCNT is cleared by GRB compare match or input capture *
Synchronous clear: TCNT is cleared in synchronization with other
synchronized timers *
Description
Count rising edges
Count falling edges
Count both edges
2
Rev. 4.00 Jan 26, 2006 page 353 of 938
Section 9 16-Bit Timer
REJ09B0276-0400
1
1
(Initial value)
(Initial value)

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