HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 683
HD64F3067RF20
Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.DF3067RF20VTR.pdf
(965 pages)
Specifications of HD64F3067RF20
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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(4) Do not input a constant high level to the FWE pin.
(5) Program/erase the flash memory in accordance with the recommended algorithms.
(6) Do not set/clear the SWE bit while a program is executing on flash memory.
To prevent erroneous programming/erasing in the event of program runaway, etc., input a high
level to the FWE pin only when programming/erasing flash memory (including flash memory
emulation by RAM). Avoid system configurations that constantly input a high level to the
FWE pin. Handle program runaway, etc. by starting the watchdog timer so that flash memory
is not overprogrammed/overerased even while a high level is input to the FWE pin.
The recommended algorithms can program/erase the flash memory without applying voltage
stress to the device or sacrificing the reliability of the program data.
When setting the PSU and ESU bits in FLMCR, set the watchdog timer for program runaway,
etc.
Before performing flash memory program execution or data read, clear the SWE bit.
If the SWE bit is set, the flash data can be reprogrammed, but flash memory cannot be
accessed for purposes other than verify (verify during programming/erase).
Similarly perform flash memory program execution and data read after clearing the SWE bit
even when using the RAM emulation function with a high level input to the FWE pin.
However, RAM area that overlaps flash memory space can be read/programmed whether the
SWE bit is set or cleared.
In the boot mode, perform FWE pin High/Low switching during reset.
In the user program mode, FWE=High/Low switching is possible regardless of the RES
Apply an input to FWE when the program is not running away.
Input low level to the FWE pin when the SWE, ESU, PSU, EV, PV, E, and P bits in
In transition to the boot mode, input FWE=High level and set MD
RES input is low. At this time, the FWE and MD
programming setup time (t
setup time is necessary for RES reset timing even in transition from the boot mode to
another mode.
In reset during operation, the RES pin must be held at a low level for at least 20 system
clocks.
FWE input switching is also possible during program execution on flash memory.
When applying an input to the FWE pin, the program execution state must be
supervised using a watchdog timer, etc.
Do not erroneously set the SWE, ESU, PSU, EV, PV, E, and P bits when FWE
High/Low.
input.
FLMCR have been cleared.
MDS
) relative to the reset clear timing. The mode programming
Rev. 4.00 Jan 26, 2006 page 659 of 938
2
to MD
0
inputs must satisfy the mode
2
to MD
REJ09B0276-0400
Section 18 ROM
0
while the
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