HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 513

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 7—Transmit Interrupt Enable (TIE): Enables or disables the transmit-data-empty interrupt
(TXI) requested when the TDRE flag in SSR is set to 1 due to transfer of serial transmit data from
TDR to TSR.
Bit 7
TIE
0
1
Note: * TXI interrupt requests can be cleared by reading the value 1 from the TDRE flag, then
Bit 6—Receive Interrupt Enable (RIE): Enables or disables the receive-data-full interrupt (RXI)
requested when the RDRF flag in SSR is set to 1 due to transfer of serial receive data from RSR to
RDR; also enables or disables the receive-error interrupt (ERI).
Bit 6
RIE
0
1
Note: * RXI and ERI interrupt requests can be cleared by reading the value 1 from the RDRF, FER,
Bit 5—Transmit Enable (TE): Enables or disables the start of SCI serial transmitting operations.
Bit 5
TE
0
1
Notes: 1. The TDRE flag is fixed at 1 in SSR.
clearing it to 0; or by clearing the TIE bit to 0.
PER, or ORER flag, then clearing the flag to 0; or by clearing the RIE bit to 0.
2. In the enabled state, serial transmission starts when the TDRE flag in SSR is cleared to
0 after writing of transmit data into TDR. Select the transmit format in SMR before
setting the TE bit to 1.
Description
Transmit-data-empty interrupt request (TXI) is disabled*
Transmit-data-empty interrupt request (TXI) is enabled
Description
Receive-data-full (RXI) and receive-error (ERI) interrupt requests are disabled*
Receive-data-full (RXI) and receive-error (ERI) interrupt requests are enabled
Description
Transmitting disabled *
Transmitting enabled *
2
1
Section 13 Serial Communication Interface
Rev. 4.00 Jan 26, 2006 page 489 of 938
REJ09B0276-0400
(Initial value)
(Initial value)
(Initial value)