HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 93

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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16 bits. A
(BRCR). (In this mode A
3.4.4
Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space. The initial bus mode after a reset is 16 bits, with 16-bit access
to all areas. If all areas are designated for 8-bit access in ABWCR, the bus mode switches to
8 bits. A
used for address output.)
3.4.5
Ports 1, 2, and 5 and part of port A can function as address pins A
maximum 16-Mbyte address space, but following a reset they are input ports. To use ports 1, 2,
and 5 as an address bus, the corresponding bits in their data direction registers (P1DDR, P2DDR,
and P5DDR) must be set to 1. For A
mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is designated for 16-
bit access in ABWCR, the bus mode switches to 16 bits.
3.4.6
This mode operates using the on-chip ROM, RAM, and registers. All I/O ports are available.
Mode 6 supports a maximum address space of 64 kbytes.
3.4.7
This mode operates using the on-chip ROM, RAM, and registers. All I/O ports are available.
Mode 7 supports a 1-Mbyte address space.
23
23
Mode 4
Mode 5
Mode 6
Mode 7
to A
to A
21
21
are valid when 0 is written in bits 7 to 5 of BRCR. (In this mode A
are valid when 0 is written in bits 7 to 5 of the bus release control register
20
is always used for address output.)
23
to A
20
output, write 0 in bits 7 to 4 of BRCR. The initial bus
Rev. 4.00 Jan 26, 2006 page 69 of 938
23
to A
Section 3 MCU Operating Modes
23
to A
0
, permitting access to a
0
, permitting access to a
REJ09B0276-0400
20
is always

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