HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 670

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 18 ROM
Table 18.10 Settings for Each Operating Mode in PROM Mode
Mode
Read
Output disable
Command write
Chip disable *
L
H
X
Hi-Z
Notes: For command writes when making a transition to auto-program or auto-erase mode, input
Table 18.11 PROM Mode Commands
Command Name
Memory read mode 1
Auto-program mode 129
Auto-erase mode
Status read mode
RA
WA
Dout
Din
Note: In auto-program mode. 129 cycles are required for command writing by a simultaneous
Rev. 4.00 Jan 26, 2006 page 646 of 938
REJ09B0276-0400
Status Read Mode
Status polling is used for auto-programming and auto-erasing, and normal termination can be
confirmed by reading the I/O 6 signal. In status read mode, error information is output if an
error occurs.
: Low level
: High level
: Undefined
: High impedance
Vcc (V) to FWE.
: Read address
: Program address
: Read data
: Program data
128-byte write.
1. Chip disable is not a standby state; internally, it is an operation state.
2. Ain indicates that there is also address input in auto-program mode.
3. The pin names are those assigned in H8/3067RF PROM mode.
1
Pin Names *
FWE
V
V
V
V
CC
CC
CC
CC
Number of Cycles Mode
2
2
or 0
or 0
or 0
or 0
CE
CE
CE
CE
L
L
L
H
3
1st Cycle
Write
Write
Write
Write
OE
OE
OE
OE
L
H
H
X
X
Address
X
X
X
WE
WE
WE
WE
H
H
L
X
Data Mode Address
H'00 Read RA
H'40 Write WA
H'20 Write X
H'71 Write X
D
Data output
Hi-Z
Data input
Hi-Z
2nd Cycle
0
to D
7
A
Ain
X
Ain *
X
0
to A
2
Data
Dout
Din
H'20
H'71
17

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