IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part NumberHD64F2638F20J
DescriptionIC H8S MCU FLASH 256K 128-QFP
ManufacturerRenesas Electronics America
SeriesH8® H8S/2600
HD64F2638F20J datasheets
 


Specifications of HD64F2638F20J

Core ProcessorH8S/2600Core Size16-Bit
Speed20MHzConnectivityCAN, SCI, SmartCard
PeripheralsMotor Control PWM, POR, PWM, WDTNumber Of I /o72
Program Memory Size256KB (256K x 8)Program Memory TypeFLASH
Ram Size16K x 8Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 V
Data ConvertersA/D 12x10b; D/A 2x8bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case128-QFP
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantEeprom Size-
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EEPMOV (MOVe data to EEPROM)
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
EEPMOV.W
Note: * n is the initial value of R4. Although n bytes of data are transferred, 2(n + 1) data accesses are
performed, requiring 2(n + 1) states. (n = 0, 1, 2, …, 65535).
Notes
This instruction first reads memory at the addresses indicated by ER5 and ER6, then carries out
the block data transfer.
EEPMOV.W Instruction and Interrupt
If an interrupt request occurs while the EEPMOV.W instruction is being executed, interrupt
exception handling is carried out after the current byte has been transferred. Register contents are
then as follows:
ER5: address of the next byte to be transferred
ER6: destination address of the next byte
R4:
number of bytes remaining to be transferred
The program counter value pushed on the stack in interrupt exception handling is the address of
the next instruction after the EEPMOV.W instruction. Programs should be coded as follows to
allow for interrupts during execution of the EEPMOV.W instruction.
Example:
L1: EEPMOV.W
MOV.W
R4,R4
BNE
L1
Interrupt requests other than NMI are not accepted if they are masked in the CPU.
During execution of the EEPMOV.B instruction no interrupts are accepted, including NMI.
Instruction Format
Operands
1st byte
2nd byte
7
B
D
Rev. 4.00 Feb 24, 2006 page 111 of 322
Section 2 Instruction Descriptions
Block Data Transfer
No. of
States
3rd byte
4th byte
4 + 2n *
4
5
9
8
F
REJ09B0139-0400