HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 251

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
2.2.65 (2)
SUB (SUBtract binary)
Operation
Rd – (EAs)
Assembly-Language Format
SUB.W <EAs>, Rd
Operand Size
Word
Description
This instruction subtracts a source operand from the contents of a 16-bit register Rd (destination
operand) and stores the result in the 16-bit register Rd.
Available Registers
Rd: R0 to R7, E0 to E7
Rs: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
Immediate
Register direct
Addressing
Mode
SUB (W)
Rd
Mnemonic
SUB.W
SUB.W
#xx:16, Rd
Operands
Rs, Rd
1st byte
7
1
9
9
Condition Code
H: Set to 1 if there is a borrow at bit 11;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 15;
2nd byte
rs
3
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 235 of 322
I
rd
rd
UI H
Section 2 Instruction Descriptions
3rd byte
U
IMM
N
4th byte
REJ09B0139-0400
Subtract Binary
Z
V
States
No. of
C
2
1

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