HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 223

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
2.2.58 (4)
SHAR (W)
SHAR (SHift Arithmetic Right)
Operation
Rd (right arithmetic shift)
Rd
Assembly-Language Format
SHAR.W #2, Rd
Operand Size
Word
Description
This instruction shifts the bits in a 16-bit register Rd (destination operand) two bits to the right. Bit
1 shifts into the carry flag. Bits 15 and 14 receive the previous value of bit 15. Since bit 15
remains unaltered, the sign does not change.
MSB
b15
Available Registers
Rd: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Register direct
SHAR.W
Notes
Condition Code
I
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
cleared to 0.
Z: Set to 1 if the result is zero; otherwise
cleared to 0.
V: Always cleared to 0.
C: Receives the previous value in bit 1.
. . .
b14
b13
b1
Instruction Format
Operands
1st byte
2nd byte
#2, Rd
1
1
D
Rev. 4.00 Feb 24, 2006 page 207 of 322
Section 2 Instruction Descriptions
Shift Arithmetic
UI H
U
N
Z
V
0
LSB
b0
C
3rd byte
4th byte
rd
REJ09B0139-0400
C
No. of
States
1

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