HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 41

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Type
Instruction
Arithmetic
CMP
operations
NEG
EXTU
EXTS
TAS
MAC
CLRMAC
LDMAC
STMAC
Size *
1
Function
B/W/L
Rd – Rs, Rd – #IMM
Compares data in a general register with data in
another general register or with immediate data, and
sets CCR bits according to the result.
B/W/L
0 – Rd
Rd
Takes the two’s complement (arithmetic complement)
of data in a general register.
W/L
Rd (zero extension)
Extends the lower 8 bits of a 16-bit register to word
size, or the lower 16 bits of a 32-bit register to longword
size, by padding with zeros on the left.
W/L
Rd (sign extension)
Extends the lower 8 bits of a 16-bit register to word
size, or the lower 16 bits of a 32-bit register to longword
size, by extending the sign bit.
(<bit 7> of @ERd) *
B
@ERd – 0, 1
Tests memory contents, and sets the most significant
bit (bit 7) to 1.
(EAs)
(EAd) + MAC
Performs signed multiplication on memory contents
and adds the result to the multiply-accumulate register.
The following operations can be performed:
16 bits
16 bits +32 bits
16 bits
16 bits + 42 bits
Supported by H8S/2600 CPU only.
0
MAC
Clears the multiply-accumulate register to zero.
Supported by H8S/2600 CPU only.
L
Rs
MAC, MAC
Transfers data between a general register and the
multiply-accumulate register.
Supported by H8S/2600 CPU only.
Rev. 4.00 Feb 24, 2006 page 25 of 322
Section 1 CPU
Rd
Rd
2
MAC
32 bits, saturating
42 bits, non-saturating
Rd
REJ09B0139-0400

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