HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 253

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
2.2.66
SUBS
SUBS (SUBtract with Sign extension)
Operation
Rd – 1
ERd
Rd – 2
ERd
Rd – 4
ERd
Assembly-Language Format
SUBS #1, ERd
SUBS #2, ERd
SUBS #4, ERd
Operand Size
Longword
Description
This instruction subtracts the immediate value 1, 2, or 4 from the contents of a 32-bit register ERd
(destination operand). Unlike the SUB instruction, it does not affect the condition-code flags.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Register direct
SUBS
Register direct
SUBS
Register direct
SUBS
Notes
Condition Code
I
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
Instruction Format
Operands
1st byte
2nd byte
#1, ERd
1
B
0
0 erd
#2, ERd
1
B
8
0 erd
#4, ERd
1
B
9
0 erd
Rev. 4.00 Feb 24, 2006 page 237 of 322
Section 2 Instruction Descriptions
Subtract Binary Address Data
UI H
U
N
Z
V
C
— —
No. of
States
3rd byte
4th byte
REJ09B0139-0400
1
1
1

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