HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 58

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 2 Instruction Descriptions
2.1.1
Example: ADD. B <EAs>, Rd
The operand size is byte (B), word (W), or longword (L). Some instructions are restricted to a
limited set of operand sizes.
The symbol <EA> indicates that two or more addressing modes can be used. The H8S/2600 CPU
supports the eight addressing modes listed next. Effective address calculation is described in
section 1.7, Addressing Modes and Effective Address Calculation.
Symbol
Rn
@ERn
@(d:16, ERn)/@(d:32, ERn)
@ERn+/@–ERn
@aa:8/@aa:16/@aa:24/@aa:32
#xx:8/#xx:16/#xx:32
@(d:8, PC)/@(d:16, PC)
@@aa:8
The suffixes :8, :16, :24, and :32 may be omitted. In particular, if the :8, :16, :24, or :32
designation is omitted in an absolute address or displacement, the assembler will optimize the
length according to the value range. For details, refer to the H8S, H8/300 Series cross assembler
user’s manual.
Note: “:2” and “:3” in “#xx (:2)” and “#xx (:3)” indicate the specifiable bit length. Do not
Rev. 4.00 Feb 24, 2006 page 42 of 322
REJ09B0139-0400
include (:2) or (:3) in the assembler notation.
Example: TRAPA #3
Assembly-Language Format
Mnemonic
Size
Source operand
Destination operand
Immediate (8-bit, 16-bit, or 32-bit)
Addressing Mode
Register direct
Register indirect
Register indirect with displacement (16-bit or 32-bit)
Register indirect with post-increment or pre-decrement
Absolute address (8-bit, 16-bit, 24-bit, or 32-bit)
Program-counter relative (8-bit or 16-bit)
Memory indirect

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