HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 56

IC SUPERH MPU ROMLESS 240QFP

HD6417727F100C

Manufacturer Part Number
HD6417727F100C
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100C

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F100C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 22 USB Pin Multiplex Controller
Table 22.1
Table 22.2
Table 22.3
Table 22.4
Section 23 USB Function Controller
Table 23.1
Table 23.2
Table 23.3
Section 24 USB HOST Module
Table 24.1
Table 24.2
Section 25 LCD Controller
Table 25.1
Table 25.2
Table 25.3
Table 25.4
Table 25.5
Table 25.6
Table 25.7
Section 26 Pin Function Controller (PFC)
Table 26.1
Table 26.2
Section 27 I/O Ports
Table 27.1
Table 27.2
Table 27.3
Table 27.4
Table 27.5
Table 27.6
Table 27.7
Table 27.8
Rev.6.00 Mar. 27, 2009 Page liv of lvi
REJ09B0254-0600
Pin Configuration (Digital Transceiver Signal)...................................................... 681
Pin Configuration (Analog Transceiver Signal) ..................................................... 681
Pin Configuration (Power Control signal).............................................................. 682
Register Configuration ........................................................................................... 682
Pin Configuration and Functions............................................................................ 692
USB Function Module Registers............................................................................ 693
Command Decoding on Application Side .............................................................. 717
Pin Configuration ................................................................................................... 726
Register Configuration ........................................................................................... 727
Pin Configuration ................................................................................................... 765
Register Configuration ........................................................................................... 765
Limits on the Resolution of Rotated Displays, Burst Length,
and Connected Memory (32-bit Bus SDRAM) ...................................................... 792
Limits on the Resolution of Rotated Displays, Burst Length,
and Connected Memory (16-bit Bus SDRAM) ...................................................... 795
Available Power-Supply Control-Sequence Periods at Typical Frame Rates ........ 805
LCDC Operating Modes ........................................................................................ 806
LCD Module Power-Supply States ........................................................................ 806
List of Multiplexed Pins ......................................................................................... 821
Pin Function Controller Registers .......................................................................... 826
Pin Function Controller Registers .......................................................................... 846
Read/Write Operation of the Ports A to C, E, J, K Data Register .......................... 847
Read/Write Operation of the Port D Data Register (PDDR) .................................. 849
Read/Write Operation of the Ports F, M Data Register (PFDR, PMDR) ............... 850
Read/Write Operation of the Port G Data Register (PGDR) .................................. 851
Read/Write Operation of the Port H Data Register (PHDR) .................................. 853
Read/Write Operation of the Port L Data Register (PLDR)................................... 854
Read/Write Operation of the SC Port Data Register (SCPDR) .............................. 856

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