HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 941

IC SUPERH MPU ROMLESS 240QFP

HD6417727F100C

Manufacturer Part Number
HD6417727F100C
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100C

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F100C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
29.3
The D/A converter has two built-in D/A conversion circuits that can perform conversion
independently.
D/A conversion is performed constantly while enabled in DACR. If the DADR0 or DADR1 value
is modified, conversion of the new data begins immediately. The conversion results are output
when bits DAOE0 and DAOE1 are set to 1.
An example of D/A conversion on channel 0 is given next. Timing is indicated in figure 29.2.
1. Data to be converted is written in DADR0.
2. Bit DAOE0 is set to 1 in DACR. D/A conversion starts and DA0 becomes an output pin. The
3. If the DADR0 value is modified, conversion starts immediately, and the result is output after
4. When the DAOE0 bit is cleared to 0, DA0 becomes an input pin.
converted result is output after the conversion time. The output value is (DADR0 contents/256)
× AVcc. Output of this conversion result continues until the value in DADR0 is modified or
the DAOE0 bit is cleared to 0.
the conversion time.
Address bus
DADR0
DAOE0
DA0
Legend:
t
DCONV
Operation
: D/A conversion time
write cycle
DADR0
High-impedance state
Figure 29.2 Example of D/A Converter Operation
write cycle
DACR
Conversion data 1
t
DCONV
Conversion
result 1
Rev.6.00 Mar. 27, 2009 Page 883 of 1036
write cycle
DADR0
t
DCONV
Section 29 D/A Converter
Conversion data 2
Conversion
result 2
REJ09B0254-0600
write cycle
DACR

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