UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet
UPD78F1174AGF-GAT-AX
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UPD78F1174AGF-GAT-AX Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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User’s Manual 78K0R/KH3 16-bit Single-Chip Microcontrollers μ PD78F1174, 78F1174A, 78F1174A(A) μ PD78F1175, 78F1175A, 78F1175A(A) μ PD78F1176, 78F1176A, 78F1176A(A) μ PD78F1177, 78F1177A, 78F1177A(A) μ PD78F1178, 78F1178A, 78F1178A(A) Document No. U18432EJ5V0UD00 (5th edition) Date Published September 2009 NS 2006 Printed in Japan ...
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User’s Manual U18432EJ5V0UD ...
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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
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Windows and Windows NT are registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/ trademark of International Business Machines Corporation. EEPROM is a trademark of NEC Electronics Corporation. SuperFlash is a registered ...
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Readers This manual is intended for user engineers who wish to understand the functions of the 78K0R/KH3 and design and develop application systems and programs for these devices. The target products are as follows. • Conventional-specification products of the 78K0R/KH3: ...
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How to interpret the register format: → For a bit number enclosed in angle brackets, the bit name is defined as a reserved word in the RA78K0R, and is defined as an sfr variable using the #pragma sfr directive ...
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Documents Related to Flash Memory Programming PG-FP4 Flash Memory Programmer User’s Manual PG-FP5 Flash Memory Programmer Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document when designing. ...
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CHAPTER 1 OUTLINE ............................................................................................................................ 18 1.1 Differences Between Conventional-Specification Products ( Specification Products ( 1.2 Features......................................................................................................................................... 20 1.3 Applications .................................................................................................................................. 21 1.4 Ordering Information.................................................................................................................... 21 1.5 Pin Configuration (Top View) ...................................................................................................... 22 1.6 78K0R/Kx3 Microcontroller Lineup............................................................................................. 24 1.7 Block Diagram ...
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CHAPTER 3 CPU ARCHITECTURE...................................................................................................... 55 3.1 Memory Space .............................................................................................................................. 55 3.1.1 Internal program memory space .......................................................................................................63 3.1.2 Mirror area ........................................................................................................................................65 3.1.3 Internal data memory space..............................................................................................................66 3.1.4 Special function register (SFR) area .................................................................................................67 3.1.5 Extended special function register (2nd SFR: 2nd ...
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Port 15...........................................................................................................................................161 4.2.16 Port 16...........................................................................................................................................162 4.3 Registers Controlling Port Function ........................................................................................ 163 4.4 Port Function Operations .......................................................................................................... 172 4.4.1 Writing to I/O port ............................................................................................................................172 4.4.2 Reading from I/O port......................................................................................................................172 4.4.3 Operations on I/O port.....................................................................................................................172 4.4.4 Connecting to external device ...
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CHAPTER 7 TIMER ARRAY UNIT ..................................................................................................... 244 7.1 Functions of Timer Array Unit .................................................................................................. 244 7.1.1 Functions of each channel when it operates independently............................................................244 7.1.2 Functions of each channel when it operates with another channel .................................................245 7.1.3 LIN-bus supporting function ...
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CHAPTER 9 WATCHDOG TIMER ....................................................................................................... 359 9.1 Functions of Watchdog Timer................................................................................................... 359 9.2 Configuration of Watchdog Timer ............................................................................................ 360 9.3 Register Controlling Watchdog Timer...................................................................................... 361 9.4 Operation of Watchdog Timer................................................................................................... 362 9.4.1 Controlling operation of watchdog timer ..........................................................................................362 9.4.2 Setting ...
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CHAPTER 13 SERIAL ARRAY UNIT ................................................................................................. 410 13.1 Functions of Serial Array Unit ................................................................................................ 410 13.1.1 3-wire serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21) ....................................................410 13.1.2 UART (UART0, UART1, UART2, UART3) ....................................................................................411 2 13.1.3 Simplified I C (IIC10, IIC11, ...
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CHAPTER 14 SERIAL INTERFACE IIC0............................................................................................ 555 14.1 Functions of Serial Interface IIC0 ........................................................................................... 555 14.2 Configuration of Serial Interface IIC0 ..................................................................................... 558 14.3 Registers to Controlling Serial Interface IIC0........................................................................ 561 2 14 Bus Mode Functions .......................................................................................................... 573 14.4.1 ...
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Holding DMA transfer pending by DWAITn...................................................................................650 16.5.7 Forced termination by software.....................................................................................................651 16.6 Cautions on Using DMA Controller ........................................................................................ 652 CHAPTER 17 INTERRUPT FUNCTIONS ............................................................................................ 655 17.1 Interrupt Function Types......................................................................................................... 655 17.2 Interrupt Sources and Configuration ..................................................................................... 655 17.3 Registers ...
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CHAPTER 23 REGULATOR ................................................................................................................. 733 23.1 Regulator Overview.................................................................................................................. 733 23.2 Registers Controlling Regulator ............................................................................................. 733 CHAPTER 24 OPTION BYTE............................................................................................................... 735 24.1 Functions of Option Bytes ...................................................................................................... 735 24.1.1 User option byte (000C0H to 000C2H/010C0H to 010C2H) .........................................................735 24.1.2 On-chip debug ...
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CHAPTER 28 INSTRUCTION SET ....................................................................................................... 764 28.1 Conventions Used in Operation List...................................................................................... 765 28.1.1 Operand identifiers and specification methods .............................................................................765 28.1.2 Description of operation column....................................................................................................766 28.1.3 Description of flag operation column .............................................................................................767 28.1.4 PREFIX Instruction .......................................................................................................................767 28.2 Operation List ........................................................................................................................... ...
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Differences Between Conventional-Specification Products ( Specification Products ( This manual describes the functions of the 78K0R/KH3 microcontroller products with conventional specifications μ ( PD78F117x) and expanded specifications ( The differences between the conventional-specification products ( μ products ( PD78F117xA) ...
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Item Conditions 1.8 V ≤ V < 2.7 V, Expansion of operating DD voltage of external bus synchronous interface separate/synchronous multiplexed/asynchronous separate mode − Support for (A) grade product specifications CHAPTER 1 OUTLINE Conventional- Expanded- Specification Specification Products Products Not ...
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Features Minimum instruction execution time can be changed from high speed (0.05 speed system clock) to ultra low-speed (61 General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks) ROM, RAM capacities Item Part ...
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Applications Home appliances • Laser printer motors • Clothes washers • Air conditioners • Refrigerators Home audio systems Digital cameras, digital video cameras 1.4 Ordering Information • Flash memory version Part Number μ 128-pin plastic LQFP (fine pitch) (14 ...
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Pin Configuration (Top View) • 128-pin plastic LQFP (fine pitch) (14 × 20) 1 P142/SCK20/SCL20 P141/PCLBUZ1/INTP7 2 P140/PCLBUZ0/INTP6 3 P120/INTP0/EXLVI 4 P37 5 P36 6 P35 7 8 P34 P33 9 P32 10 P163/TI13/TO13 11 P162/TI12/TO12 12 P161/TI11/TO11 13 ...
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Pin Identification ANI0 to ANI15: Analog input ANO0, ANO1: Analog output ASTB: Address strobe Analog reference voltage REF0 REF1 AV : Analog ground SS CLKOUT: Clock output Power supply for port DD0 ...
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Microcontroller Lineup ROM RAM 78K0R/KE3 64 Pins − 512 − 384 μ 256 PD78F1146 μ PD78F1146A μ 192 PD78F1145 μ PD78F1145A μ 128 ...
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Block Diagram TIMER ARRAY UNIT0 (8ch) TI00/P00 ch0 TO00/P01 TI01/TO01/P16 ch1 TI02/TO02/P17 ch2 ch3 TI03/TO03/P31 TI04/TO04/P42 ch4 ch5 TI05/TO05/P46 TI06/TO06/P131 ch6 TI07/TO07/P145 ch7 RxD3/P14 (LINSEL) TIMER ARRAY UNIT1 (4ch) ch0 TI10/TO10/P160 ch1 TI11/TO11/P161 ch2 TI12/TO12/P162 TI13/TO13/P163 ch3 LOW-SPEED INTERNAL ...
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Outline of Functions μ Item μ Internal Flash memory 128 KB memory (self-programming supported) RAM 8 KB Memory space 1 MB External memory expansion space 824 KB max. Main system High-speed system X1 (crystal/ceramic) oscillation, external main system clock ...
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Item μ PD78F1174A • UART supporting LIN-bus: 1 channel Serial interface • CSI: 2 channels/UART: 1 channel • CSI: 2 channels/UART: 1 channel/simplified I • CSI: 2 channels/UART: 1 channel/simplified I • bits × 16 bits = ...
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Pin Function List There are five types of pin I/O buffer power supplies: AV between these power supplies and the pins is shown below. Power Supply AV P20 to P27, P150 to P157 REF0 AV P110, P111 REF1 • ...
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Port functions (1/3) Function Name I/O P00 I/O Port 0. 8-bit I/O port. P01 Input of P03 and P04 can be set to TTL input buffer. P02 Output of P02 to P04 can be set to N-ch open-drain output ...
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Port functions (2/3) Function Name I/O P60 I/O Port 6. 8-bit I/O port. P61 Output of P60 to P63 can be set to N-ch open-drain output (6 V P62 tolerance). P63 Input/output can be specified in 1-bit units. For ...
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Port functions (3/3) Function Name I/O P130 Output Port 13. 1-bit output port and 1-bit I/O port. P131 I/O For only P131 use of an on-chip pull-up resistor can be specified by a software setting. P140 I/O Port 14. ...
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Non-port functions (1/4) Function Name I/O ANI0 to ANI7 Input A/D converter analog input ANI8 to ANI15 Input A/D converter analog input ANO0 Output D/A converter analog output ANO1 Output D/A converter analog output CLKOUT Output External expansion clock ...
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Non-port functions (2/4) Function Name I/O PCLBUZ0 Output Clock output/buzzer output PCLBUZ1 − REGC Connecting regulator output (2.5 V) stabilization capacitance for internal operation. Connect RTCDIV Output Real-time counter clock (32 kHz divided frequency) output RTCCL ...
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Non-port functions (3/4) Function Name I/O TI00 Input External count clock input to 16-bit timer 00 TI01 External count clock input to 16-bit timer 01 TI02 External count clock input to 16-bit timer 02 TI03 External count clock input ...
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Non-port functions (4/4) Function Name I/O − V Ground potential (P121 to P124 and other than ports (excluding SS RESET and FLMD0 pins)) − Ground potential for ports (other than P20 to P27, P110, P111, SS0 ...
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Description of Pin Functions 2.2.1 P00 to P07 (port 0) P00 to P07 function as an 8-bit I/O port. P00 to P06 pins also function as timer I/O, serial interface data I/O, clock I/O, internal system clock output, and ...
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CLKOUT This is an internal system clock output pin. (k) WAIT This is an external wait signal input pin. Caution To use P02/SO10/TxD1 and P04/SCK10/SCL10 as general-purpose ports, set serial communication operation setting register 02 (SCR02) to the default ...
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TO01, TO02 These are the timer output pins of 16-bit timers 01 and 02. (j) INTP5 This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising and falling edges) ...
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Control mode P30 and P31 function as external interrupt request input, timer I/O, and real-time counter correction clock output. (a) INTP3, INTP4 These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, ...
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TOOL1 This is a clock output pin for a debugger. When the on-chip debug function is used, P41/TOOL1 pin can be used as follows by the mode setting on the debugger. 1-line mode: can be used as a port ...
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Control mode P50 to P57 function as external expansion I/O. (a) EX8 to EX15 These are the external expansion I/O (multiplexed address/data bus, address bus, data bus) pins. 2.2.7 P60 to P67 (port 6) P60 to P67 function as ...
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Control mode P70 to P77 function as key interrupt input, external interrupt request input, and external expansion output. (a) KR0 to KR7 These are the key interrupt input pins (b) INTP8 to INTP11 These are the external interrupt request ...
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SI11 This is a serial data input pin of serial interface CSI11. (c) SO11 This is a serial data output pin of serial interface CSI11. (d) SCK11 This is a serial clock I/O pin of serial interface CSI11. (e) ...
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Port mode P120 and P125 to P127 function as a 4-bit I/O port. P120 and P125 to P127 can be set to input or output port using port mode register 12 (PM12). Use of an on-chip pull-up resistor can ...
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Port mode P130 functions as a 1-bit output port. P131 functions as a 1-bit I/O port. P131 can be set to input or output port in 1-bit units using port mode register 13 (PM13). Use of an on-chip pull-up ...
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SO20 This is a serial data output pin of serial interface CSI20. (g) SCK20 This is a serial clock I/O pin of serial interface CSI20. (h) TxD2 This is a serial data output pin of serial interface UART2. (i) ...
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Control mode P160 to P163 function as timer I/O. (a) TI10 to TI13 These are the pins for inputting an external count clock/capture trigger to 16-bit timer 10 to 13. (b) TO10 to TO13 These are the timer output ...
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AV REF1 This is the D/A converter reference voltage input pin and the positive power supply pin of P110, P111, and the D/A converter. The voltage that can be supplied to AV are used as digital I/Os or analog ...
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DD0 DD1 V is the positive power supply pin for P121 to P124 and pins other than ports (excluding the RESET and FLMD0 DD pins). EV and EV are the positive power supply ...
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Pin I/O Circuits and Recommended Connection of Unused Pins Table 2-4 shows the types of pin I/O circuits and the recommended connections of unused pins. Table 2-4. Connection of Unused Pins (1/3) Pin Name I/O Circuit Type P00/TI00 8-R ...
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Table 2-4. Connection of Unused Pins (2/3) Pin Name I/O Circuit Type P50/EX8, P51/EX9 8-R P52/EX10 to P57/EX15 5-AG P60/SCL0 13-R P61/SDA0 P62, P63 13-P P64/RD 5-AG P65/WR0 P66/WR1 P67/ASTB P70/KR0/EX16 to 8-R P73/KR3/EX19 P74/KR4/EX20/INTP8 to P77/KR7/EX23/INTP11 P80/EX0 to P87/EX7 ...
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Table 2-4. Connection of Unused Pins (3/3) Pin Name I/O Circuit Type P140/PCLBUZ0/INTP6 8-R P141/PCLBUZ1/INTP7 P142/SCK20/SCL20 5-AN P143/SI20/RxD2/SDA20 P144/SO20/TxD2 5-AG P145/TI07/TO07 8-R Note P150/ANI8 to P157/ANI15 11-G P160/TI10/TO10 to 8-R P163/TI13/TO13 AV REF0 AV REF1 AV SS FLMD0 2-W RESET ...
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Type 2 IN Schmitt-triggered input with hysteresis characteristics Type 2 DD0 P-ch N- SS0 IN Schmitt-triggered input with hysteresis characteristics Type 3 DD0, Data EV EV SS0, CHAPTER 2 PIN FUNCTIONS Figure ...
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Type 11-G Data Output disable P-ch Comparator + _ N-ch Series resistor string voltage AV SS Input enable Type 12-G AV REF1 Data P-ch Output N-ch disable AV SS Input enable P-ch Output analog voltage N-ch Type 13-P Data Output ...
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Memory Space Products in the 78K0R/KH3 can access memory space. Figures 3-1 to 3-5 show the memory maps. Figure 3-1. Memory Map ( Special function register (SFR ...
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Figure 3-2. Memory Map ( Special function register (SFR) 256 bytes General-purpose register 32 bytes ...
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Figure 3-3. Memory Map ( Special function register (SFR) 256 bytes General-purpose register 32 bytes ...
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Figure 3-4. Memory Map ( Special function register (SFR) 256 bytes General-purpose register 32 bytes ...
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Figure 3-5. Memory Map ( Special function register (SFR) 256 bytes General-purpose register 32 bytes ...
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Remark The flash memory is divided into blocks (one block = 2 KB). For the address values and block numbers, see Table 3-1 Correspondence Between Address Values and Block Numbers in Flash Memory ...
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Correspondence between the address values and block numbers in the flash memory are shown below. Table 3-1. Correspondence Between Address Values and Block Numbers in Flash Memory (1/2) Address Value Block Address Value Number 00000H to 007FFH 00H 10000H to ...
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Table 3-1. Correspondence Between Address Values and Block Numbers in Flash Memory (2/2) Address Value Block Address Value Number 40000H to 407FFH 80H 50000H to 507FFH 40800H to 40FFFH 81H 50800H to 50FFFH 41000H to 417FFH 82H 51000H to 517FFH ...
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Internal program memory space The internal program memory space stores the program and table data. 78K0R/KH3 products incorporate internal ROM (flash memory), as shown below. Part Number μ PD78F1174, 78F1174A μ PD78F1175, 78F1175A μ PD78F1176, 78F1176A μ PD78F1177, 78F1177A ...
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Vector Table Address Interrupt Source 00000H RESET input, POC, LVI, WDT, TRAP 00004H INTWDTI 00006H INTLVI 00008H INTP0 0000AH INTP1 0000CH INTP2 0000EH INTP3 00010H INTP4 00012H INTP5 00014H INTST3 00016H INTSR3 00018H INTSRE3 0001AH INTDMA0 0001CH INTDMA1 0001EH INTST0/INTCSI00 ...
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Mirror area The 78K0R/KH3 mirrors the data flash area of 00000H to 0FFFFH or 10000H to 1FFFFH, to F0000H to FFFFFH (the data flash area to be mirrored is set by the processor mode control register (PMC)). By reading ...
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Processor mode control register (PMC) This register selects the flash memory space for mirroring to area from F0000H to FFFFFH. PMC can be set by a 1-bit or 8-bit memory manipulation instruction. Reset signal generation sets this register to ...
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Special function register (SFR) area On-chip peripheral hardware special function registers (SFRs) are allocated in the area FFF00H to FFFFFH (see Table 3-5 in 3.2.4 Special function registers (SFRs)). Caution Do not access addresses to which SFRs are not ...
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Data memory addressing Addressing refers to the method of specifying the address of the instruction to be executed next or the address of the register or memory relevant to the execution of instructions. Several addressing modes are provided for ...
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Figure 3-8. Correspondence Between Data Memory and Addressing ( Special function register (SFR 256 bytes ...
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Figure 3-9. Correspondence Between Data Memory and Addressing ( Special function register (SFR 256 bytes ...
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Figure 3-10. Correspondence Between Data Memory and Addressing ( Special function register (SFR 256 bytes ...
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Figure 3-11. Correspondence Between Data Memory and Addressing ( Special function register (SFR 256 bytes ...
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Processor Registers The 78K0R/KH3 products incorporate the following processor registers. 3.2.1 Control registers The control registers control the program sequence, statuses and stack memory. The control registers consist of a program counter (PC), a program status word (PSW) and ...
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Auxiliary carry flag (AC) If the operation result has a carry from bit borrow at bit 3, this flag is set (1 reset (0) in all other cases. (e) In-service priority flags (ISP1, ISP0) ...
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Figure 3-15. Data to Be Saved to Stack Memory PUSH rp instruction SP←SP−2 ↑ Register pair lower SP−2 ↑ SP−1 Register pair higher ↑ → SP CALL, CALLT instructions (4-byte stack) SP←SP−4 ↑ PC7 to PC0 SP−4 ↑ SP−3 PC15 ...
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Figure 3-16. Configuration of General-Purpose Registers FFEFFH Register bank 0 FFEF8H Register bank 1 FFEF0H Register bank 2 FFEE8H Register bank 3 FFEE0H FFEFFH Register bank 0 FFEF8H Register bank 1 FFEF0H Register bank 2 FFEE8H Register bank 3 FFEE0H ...
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ES and CS registers The ES register is used for data access and the CS register is used to specify the higher address when a branch instruction is executed. The default value of the ES register after reset is ...
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Special function registers (SFRs) Unlike a general-purpose register, each SFR has a special function. SFRs are allocated to the FFF00H to FFFFFH area. SFRs can be manipulated like general-purpose registers, using operation, transfer, and bit manipulation instructions. The manipulable ...
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Address Special Function Register (SFR) Name FFF00H Port register 0 FFF01H Port register 1 FFF02H Port register 2 FFF03H Port register 3 FFF04H Port register 4 FFF05H Port register 5 FFF06H Port register 6 FFF07H Port register 7 FFF08H Port ...
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Address Special Function Register (SFR) Name FFF2DH Port mode register 13 FFF2EH Port mode register 14 FFF2FH Port mode register 15 FFF30H A/D converter mode register FFF31H Analog input channel specification register FFF32H D/A converter mode register FFF34H Port register ...
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Address Special Function Register (SFR) Name FFF70H Timer data register 10 FFF71H FFF72H Timer data register 11 FFF73H FFF74H Timer data register 12 FFF75H FFF76H Timer data register 13 FFF77H FFF90H Sub-count register FFF91H FFF92H Second count register FFF93H Minute ...
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Address Special Function Register (SFR) Name FFFB0H DMA SFR address register 0 FFFB1H DMA SFR address register 1 FFFB2H DMA RAM address register 0L FFFB3H DMA RAM address register 0H FFFB4H DMA RAM address register 1L FFFB5H DMA RAM address ...
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Address Special Function Register (SFR) Name FFFF0H Multiplication input data register A FFFF1H FFFF2H Multiplication input data register B FFFF3H FFFF4H Higher multiplication result storage register FFFF5H FFFF6H Lower multiplication result storage register FFFF7H FFFFEH Processor mode control register FFFFFH ...
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Extended special function registers (2nd SFRs: 2nd Special Function Registers) Unlike a general-purpose register, each extended SFR (2nd SFR) has a special function. Extended SFRs are allocated to the F0000H to F07FFH area. SFRs other than those in the ...
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Table 3-6. Extended SFR (2nd SFR) List (1/6) Address Special Function Register (SFR) Name F0017H A/D port configuration register F0030H Pull-up resistor option register 0 F0031H Pull-up resistor option register 1 F0033H Pull-up resistor option register 3 F0034H Pull-up resistor ...
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Table 3-6. Extended SFR (2nd SFR) List (2/6) Address Special Function Register (SFR) Name F010CH Serial flag clear trigger register 02 F010DH F010EH Serial flag clear trigger register 03 F010FH F0110H Serial mode register 00 F0111H F0112H Serial mode register ...
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Table 3-6. Extended SFR (2nd SFR) List (3/6) Address Special Function Register (SFR) Name F014CH Serial flag clear trigger register 12 F014DH F014EH Serial flag clear trigger register 13 F014FH F0150H Serial mode register 10 F0151H F0152H Serial mode register ...
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Table 3-6. Extended SFR (2nd SFR) List (4/6) Address Special Function Register (SFR) Name F018AH Timer counter register 05 F018BH F018CH Timer counter register 06 F018DH F018EH Timer counter register 07 F018FH F0190H Timer mode register 00 F0191H F0192H Timer ...
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Table 3-6. Extended SFR (2nd SFR) List (5/6) Address Special Function Register (SFR) Name F01B6H Timer clock select register 0 F01B7H F01B8H Timer output register 0 F01B9H F01BAH Timer output enable register 0 F01BBH F01BCH Timer output level register 0 ...
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Table 3-6. Extended SFR (2nd SFR) List (6/6) Address Special Function Register (SFR) Name F01E2H Timer output enable register 1 F01E3H F01E4H Timer output level register 1 F01E5H F01E6H Timer output mode register 1 F01E7H Remark For SFRs in the ...
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Instruction Address Addressing 3.3.1 Relative addressing [Function] Relative addressing stores in the program counter (PC) the result of adding a displacement value included in the instruction word (signed complement data: −128 to +127 or −32768 to +32767) to the ...
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Table indirect addressing [Function] Table indirect addressing specifies a table address in the CALLT table area (0080H to 00BFH) with the 5-bit immediate data in the instruction word, stores the contents at that table address and the next address ...
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Register direct addressing [Function] Register direct addressing stores in the program counter (PC) the contents of a general-purpose register pair (AX/BC/DE/HL) and CS register of the current register bank specified with the instruction word as 20-bit data, and specifies ...
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Addressing for Processing Data Addresses 3.4.1 Implied addressing [Function] Instructions for accessing registers (such as accumulators) that have special functions are directly specified with the instruction word, without using any register specification field in the instruction word. [Operand format] ...
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Direct addressing [Function] Direct addressing uses immediate data in the instruction word as an operand address to directly specify the target address. [Operand format] Identifier ADDR16 Label or 16-bit immediate data (only the space from F0000H to FFFFFH is ...
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Short direct addressing [Function] Short direct addressing directly specifies the target addresses using 8-bit data in the instruction word. This type of addressing is applied only to the space from FFE20H to FFF1FH. [Operand format] Identifier SADDR Label, FFE20H ...
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SFR addressing [Function] SFR addressing directly specifies the target SFR addresses using 8-bit data in the instruction word. This type of addressing is applied only to the space from FFF00H to FFFFFH. [Operand format] Identifier SFR SFR name SFRP ...
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Register indirect addressing [Function] Register indirect addressing directly specifies the target addresses using the contents of the register pair specified with the instruction word as an operand address. [Operand format] Identifier − [DE], [HL] (only the space from F0000H ...
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Based addressing [Function] Based addressing uses the contents of a register pair specified with the instruction word as a base address, and 8-bit immediate data or 16-bit immediate data as offset data. The sum of these values is used ...
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Figure 3-32. Example of [HL + byte], [DE + byte] OP code byte Figure 3-33. Example of word[B], word[C] OP code Low Addr. High Addr. OP code Low Addr. High Addr. 100 CHAPTER 3 CPU ARCHITECTURE rp (HL/DE) Target memory ...
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CHAPTER 3 CPU ARCHITECTURE Figure 3-35. Example of ES:[HL + byte], ES:[DE + byte (HL/DE) OP code byte Figure 3-36. Example of ES:word[B], ES:word[ (B/C) OP code Low Addr. High Addr. Figure 3-37. Example of ES:word[BC] ...
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Based indexed addressing [Function] Based indexed addressing uses the contents of a register pair specified with the instruction word as the base address, and the content of the B register or C register similarly specified with the instruction word ...
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Stack addressing [Function] The stack area is indirectly addressed with the stack pointer (SP) contents. This addressing is automatically employed when the PUSH, POP, subroutine call, and return instructions are executed or the register is saved/restored upon generation of ...
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Port Functions There are five types of pin I/O buffer power supplies: AV between these power supplies and the pins is shown below. Power Supply AV P20 to P27, P150 to P157 REF0 AV P110, P111 REF1 • Port ...
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Function Name I/O P00 I/O Port 0. 8-bit I/O port. P01 Input of P03 and P04 can be set to TTL input buffer. P02 Output of P02 to P04 can be set to N-ch open-drain output (V P03 tolerance). Input/output ...
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Function Name I/O P60 I/O Port 6. 8-bit I/O port. P61 Output of P60 to P63 can be set to N-ch open-drain output (6 V P62 tolerance). P63 Input/output can be specified in 1-bit units. For only P64 to P67, ...
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Function Name I/O P130 Output Port 13. 1-bit output port and 1-bit I/O port. For only P131 use of an on-chip pull-up resistor can be specified P131 I software setting. P140 I/O Port 14. 6-bit I/O port. P141 ...
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Port Configuration Ports include the following hardware. Item Control registers Port mode registers (PM0 to PM9, PM11 to PM16) Port registers (P0 to P9, P11 to P16) Pull-up resistor option registers (PU0, PU1, PU3 to PU9, PU11 to PU14, ...
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Port 0 Port 8-bit I/O port with an output latch. Port 0 can be set to the input mode or output mode in 1-bit units using port mode register 0 (PM0). When the P00 to P07 ...
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WR PU PU0 PU00 Alternate function RD WR PORT P0 Output latch (P00 PM0 PM00 P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 RD: Read signal WR××: Write signal 110 CHAPTER ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-3. Block Diagram of P01 WR PU PU0 PU01 RD WR PORT P0 Output latch (P01 PM0 PM01 Alternate function P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode ...
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WR PU PU0 PU02 RD WR PORT P0 Output latch (P02) WR POM POM0 POM02 WR PM PM0 PM02 Alternate function P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 POM0: Port output mode ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-5. Block Diagram of P03 and P04 WR PIM PIM0 PIM03, PIM04 WR PU PU0 PU03, PU04 Alternate function RD WR PORT P0 Output latch (P03, P04) WR POM POM0 POM03, POM04 WR PM PM0 ...
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WR PU PU0 PU05 RD WR PORT P0 Output latch (P05 PM0 PM05 Alternate function P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 RD: Read signal WR××: Write signal 114 CHAPTER ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-7. Block Diagram of P06 WR PU PU0 PU06 Alternate function RD WR PORT P0 Output latch (P06 PM0 PM06 Alternate function P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: ...
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PORT Output latch WR PM P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 RD: Read signal WR××: Write signal 116 CHAPTER 4 PORT FUNCTIONS Figure 4-8. Block Diagram of ...
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Port 1 Port 8-bit I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port mode register 1 (PM1). When the P10 to P17 ...
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WR PU PU1 PU10 Alternate function RD WR PORT P1 Output latch (P10 PM1 PM10 Alternate function Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal WR××: ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-10. Block Diagram of P11 and P14 WR PU PU1 PU11, PU14 Alternate function RD WR PORT P1 Output latch (P11, P14 PM1 PM11, PM14 Alternate function P1: Port register 1 PU1: Pull-up ...
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Figure 4-11. Block Diagram of P12 and P13 WR PU PU1 PU12, PU13 RD WR PORT P1 Output latch (P12, P13 PM1 PM12, PM13 Alternate function Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-12. Block Diagram of P15 WR PU PU1 PU15 RD WR PORT P1 Output latch (P15 PM1 PM15 Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode ...
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Figure 4-13. Block Diagram of P16 and P17 WR PU PU1 PU16, PU17 Alternate function RD WR PORT P1 Output latch (P16, P17 PM1 PM16, PM17 Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 ...
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Port 2 Port 8-bit I/O port with an output latch. Port 2 can be set to the input mode or output mode in 1-bit units using port mode register 2 (PM2). This port can also be ...
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Figure 4-14. Block Diagram of P20 to P27 RD WR PORT P2 Output latch (P20 to P27 PM2 PM20 to PM27 P2: Port register 2 PM2: Port mode register 2 RD: Read signal WR××: Write signal 124 CHAPTER ...
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Port 3 Port 8-bit I/O port with an output latch. Port 3 can be set to the input mode or output mode in 1-bit units using port mode register 3 (PM3). When the P30 to P37 ...
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Figure 4-15. Block Diagram of P30 and P31 WR PU PU3 PU30, PU31 Alternate function RD WR PORT P3 Output latch (P30, P31 PM3 PM30, PM31 Alternate function P3: Port register 3 PU3: Pull-up resistor option register 3 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-16. Block Diagram of P32 to P37 WR PU PU3 PU32 to PU37 RD WR PORT P3 Output latch (P32 to P37 PM3 PM32 to PM37 P3: Port register 3 PU3: Pull-up resistor ...
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Port 4 Port 8-bit I/O port with an output latch. Port 4 can be set to the input mode or output mode in 1-bit units using port mode register 4 (PM4). When the P40 to P47 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-17. Block Diagram of P40 WR PU PU4 PU40 Alternate function RD WR PORT P4 Output latch (P40 PM4 PM40 Alternate function P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: ...
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WR PU PU4 PU41 RD WR PORT P4 Output latch (P41 PM4 PM41 Alternate function P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: Port mode register 4 RD: Read signal WR××: Write signal 130 CHAPTER ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-19. Block Diagram of P42 WR PU PU4 PU42 Alternate function RD WR PORT P4 Output latch (P42 PM4 PM42 Alternate function P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: ...
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WR PIM PIM4 PIM43 WR PU PU4 PU43 Alternate function RD WR PORT P4 Output latch (P43) WR POM POM4 POM43 WR PM PM4 PM43 Alternate function P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: Port mode ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-21. Block Diagram of P44 WR PIM PIM4 PIM44 WR PU PU4 PU44 Alternate function RD WR PORT P4 Output latch (P44 PM4 PM44 P4: Port register 4 PU4: Pull-up resistor option register ...
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WR PU PU4 PU45 RD WR PORT P4 Output latch (P45) WR POM POM4 POM45 WR PM PM4 PM45 Alternate function P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: Port mode register 4 POM4: Port output mode ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-23. Block Diagram of P46 WR PU PU4 PU46 Alternate function RD WR PORT P4 Output latch (P46 PM4 PM46 Alternate function P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: ...
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WR PU PU4 PU47 Alternate function RD WR PORT P4 Output latch (P47 PM4 PM47 P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: Port mode register 4 RD: Read signal WR××: Write signal 136 CHAPTER ...
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Port 5 Port 8-bit I/O port with an output latch. Port 5 can be set to the input mode or output mode in 1-bit units using port mode register 5 (PM5). When the P50 to P57 ...
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Figure 4-26. Block Diagram of P52 to P57 WR PU PU5 PU52 to PU57 Alternate function RD WR PORT P5 Output latch (P52 to P57 PM5 PM52 to PM57 Alternate function P5: Port register 5 PU5: Pull-up resistor ...
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Port 6 Port 8-bit I/O port with an output latch. Port 6 can be set to the input mode or output mode in 1-bit units using port mode register 6 (PM6). When the P64 to P67 ...
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Figure 4-28. Block Diagram of P62 and P63 RD WR PORT Output latch (P62, P63 PM6 PM62, PM63 P6: Port register 6 PM6: Port mode register 6 RD: Read signal WR××: Write signal 140 CHAPTER 4 PORT FUNCTIONS ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-29. Block Diagram of P64 to P67 WR PU PU6 PU64 to PU67 RD WR PORT P6 Output latch (P64 to P67 PM6 PM64 to PM67 Alternate function P6: Port register 6 PU6: ...
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Port 7 Port 8-bit I/O port with an output latch. Port 7 can be set to the input mode or output mode in 1-bit units using port mode register 7 (PM7). When used as an input ...
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Port 8 Port 8-bit I/O port with an output latch. Port 8 can be set to the input mode or output mode in 1-bit units using port mode register 8 (PM8). When the P80 to P87 ...
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Port 9 Port 8-bit I/O port with an output latch. Port 9 can be set to the input mode or output mode in 1-bit units using port mode register 9 (PM9). When the P90 to P97 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-33. Block Diagram of P94 WR PU PU9 PU94 RD WR PORT P9 Output latch (P94 PM9 PM94 P9: Port register 9 PU9: Pull-up resistor option register 9 PM9: Port mode register 9 ...
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Figure 4-34. Block Diagram of P95 and P96 WR PIM PIM9 PIM95, PIM96 WR PU PU9 PU95, PU96 Alternate function RD WR PORT P9 Output latch (P95, P96) WR POM POM9 POM95, POM96 WR PM PM9 PM95, PM96 Alternate function ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-35. Block Diagram of P97 WR PU PU9 PU97 RD WR PORT P9 Output latch (P97) WR POM POM9 POM97 WR PM PM9 PM97 Alternate function P9: Port register 9 PU9: Pull-up resistor option register ...
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Port 11 Port 8-bit I/O port with an output latch. Port 11 can be set to the input mode or output mode in 1-bit units using port mode register 11 (PM11). When the P112 to P117 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-37. Block Diagram of P112 to P117 WR PU PU11 PU112 to PU117 RD WR PORT P11 Output latch (P112 to P117 PM11 PM112 to PM117 P11: Port register 11 PU11: Pull-up resistor ...
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Port 12 P120 and P125 to P127 are a 4-bit I/O port with an output latch. P120 and P125 to P127 can be set to the input mode or output mode in 1-bit units using port mode register 12 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-39. Block Diagram of P121 and P122 Clock generator RD RD CMC: Clock operation mode control register RD: Read signal User’s Manual U18432EJ5V0UD CMC OSCSEL CMC EXCLK, OSCSEL P122/X2/EXCLK P121/X1 151 ...
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Figure 4-40. Block Diagram of P123 and P124 RD RD CMC: Clock operation mode control register RD: Read signal 152 CHAPTER 4 PORT FUNCTIONS Clock generator CMC OSCSELS CMC OSCSELS User’s Manual U18432EJ5V0UD P124/XT2 P123/XT1 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-41. Block Diagram of P125 and P126 WR PIM PIM12 PIM125, PIM126 WR PU PU12 PU125, PU126 Alternate function RD WR PORT P12 Output latch (P125, P126) WR POM POM12 POM125, POM126 WR PM PM12 ...
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WR PU PU12 PU127 RD WR PORT P12 Output latch (P127) WR POM POM12 POM127 WR PM PM12 PM127 Alternate function P12: Port register 12 PU12: Pull-up resistor option register 12 PM12: Port mode register 12 POM12: Port output mode ...
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Port 13 P130 is a 1-bit output-only port with an output latch. P131 is a 1-bit I/O port with an output latch. When used as an input port, use of an on-chip pull-up resistor can be specified by pull-up ...
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WR PU PU13 PU131 Alternate function RD WR PORT P13 Output latch (P131 PM13 PM131 Alternate function P13: Port register 13 PU13: Pull-up resistor option register 13 PM13: Port mode register 13 RD: Read signal WR××: Write signal ...
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Port 14 Port 6-bit I/O port with an output latch. Port 14 can be set to the input mode or output mode in 1-bit units using port mode register 14 (PM14). When the P140 to P145 ...
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Figure 4-45. Block Diagram of P140, P141, and P145 WR PU PU14 PU140, PU141, PU145 Alternate function RD WR PORT P14 Output latch (P140, P141, P145 PM14 PM140, PM141, PM145 Alternate function P14: Port register 14 PU14: Pull-up ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-46. Block Diagram of P142 and P143 WR PIM PIM14 PIM142, PIM143 WR PU PU14 PU142, PU143 Alternate function RD WR PORT P14 Output latch (P142, P143) WR POM POM14 POM142, POM143 WR PM PM14 ...
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WR PU PU14 PU144 RD WR PORT P14 Output latch (P144) WR POM POM14 POM144 WR PM PM14 PM144 Alternate function P14: Port register 14 PU14: Pull-up resistor option register 14 PM14: Port mode register 14 POM14: Port output mode ...
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Port 15 Port 8-bit I/O port with an output latch. Port 15 can be set to the input mode or output mode in 1-bit units using port mode register 15 (PM15). This port can also be ...
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Port 16 Port 4-bit I/O port with an output latch. Port 16 can be set to the input mode or output mode in 1-bit units using port mode register 16 (PM16). When the P160 to P163 ...
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Registers Controlling Port Function Port functions are controlled by the following six types of registers. • Port mode registers (PM0 to PM9, PM11 to PM16) • Port registers (P0 to P9, P11 to P16) • Pull-up resistor option registers ...
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Figure 4-50. Format of Port Mode Register Symbol PM0 PM07 PM06 PM05 PM1 PM17 PM16 PM15 PM2 PM27 PM26 PM25 PM3 PM37 PM36 PM35 PM4 PM47 PM46 PM45 PM5 PM57 PM56 PM55 PM6 PM67 PM66 PM65 PM7 ...
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Port registers (P0 to P9, P11 to P16) These registers write the data that is output from the chip when data is output from a port. If the data is read in the input mode, the pin level is ...
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Symbol P07 P06 P05 P1 P17 P16 P15 P2 P27 P26 P25 P3 P37 P36 P35 P4 P47 P46 P45 P5 P57 P56 P55 P6 P67 P66 P65 P7 P77 P76 P75 P8 P87 P86 P85 ...
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Pull-up resistor option registers (PU0, PU1, PU3 to PU9, PU11 to PU14, PU16) These registers specify whether the on-chip pull-up resistors of P00 to P07, P10 to P17, P30 to P37, P40 to P47, P50 to P57, P64 to ...
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Figure 4-52. Format of Pull-up Resistor Option Register Symbol PU0 PU07 PU06 PU05 PU1 PU17 PU16 PU15 PU3 PU37 PU36 PU35 PU4 PU47 PU46 PU45 Note PU5 PU57 PU56 PU55 PU6 PU67 PU66 PU65 PU7 PU77 PU76 ...
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Port input mode registers (PIM0, PIM4, PIM9, PIM12, PIM14) These registers set the input buffer of P03, P04, P43, P44, P95, P96, P125, P126, P142, and P143 in 1-bit units. TTL input buffer can be selected during serial communication ...
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Port output mode registers (POM0, POM4, POM9, POM12, POM14) These registers set the output mode of P02 to P04, P43, P45, P95 to P97, P125 to P127, or P142 to P144 in 1-bit units. N-ch open drain output (V ...
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A/D port configuration register (ADPC) This register switches the P20/ANI0 to P27/ANI7 and P150/ANI8 to P157/ANI15 pins to digital I/O of port or analog input of A/D converter. ADPC can be set by a 1-bit or 8-bit memory manipulation ...
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Port Function Operations Port operations differ depending on whether the input or output mode is set, as shown below. 4.4.1 Writing to I/O port (1) Output mode A value is written to the output latch by a transfer instruction, ...
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Connecting to external device with different potential (2 When parts of ports and 14 operate with V that operates on 2 power supply voltage are possible. Regarding inputs, ...
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Setting procedure when using I/O pins of simplified IIC10, IIC11, IIC20 and IIC21 functions <1> After reset release, the port mode is the input mode (Hi-Z). <2> Externally pull up the pin to be used (on-chip pull-up resistor cannot ...
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Settings of Port Mode Register and Output Latch When Using Alternate Function To use the alternate function of a port pin, set the port mode register and output latch as shown in Table 4-6. Table 4-6. Settings of Port ...
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Table 4-6. Settings of Port Mode Register and Output Latch When Using Alternate Function (2/3) Pin Name Function Name P17 TI02 TO02 EX31 Note 1 Note 1 P20 to P27 ANI0 to ANI7 P30 RTC1HZ INTP3 P31 TI03 TO03 INTP4 ...
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Table 4-6. Settings of Port Mode Register and Output Latch When Using Alternate Function (3/3) Pin Name Function Name P96 SI11 SDA1 P97 SO11 Note 5 P110, P111 ANO0, ANO1 P120 INTP0 EXLVI P125 SCK21 SCL21 P126 SI21 SDA21 P127 ...
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Notes 1. The functions of the ANI0/P20 to ANI7/P27 and ANI8/P150 to ANI15/P157 pins can be selected by using the A/D port configuration register (ADPC), the analog input channel specification register (ADS), PM2, and PM15. Table 4-7. Setting Functions of ...
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Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn) When a 1-bit manipulation instruction is executed on a port that provides both input and output functions, the output latch value of an input port that is not subject ...
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CHAPTER 5 EXTERNAL BUS INTERFACE 5.1 Functions of External Bus Interface The external bus interface function is used to connect an external device to an area other than the internal ROM, RAM, and SFR areas. An external device is connected ...
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The function of the external bus interface pins differs depending on the set mode. Pin EX35 to External Extension Mode EX32 256-byte extension mode 4 KB extension mode 64 KB extension mode Full address mode 256-byte extension mode 4 KB ...
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The memory maps when using the external bus interface function are as follows. Figure 5-1. Memory Map When Using External Bus Interface Function (1/3) μ (a) Memory map of PD78F1174, 78F1174A FFFFFH Special-function register (SFR) 256 bytes FFF00H FFEFFH General-purpose ...
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CHAPTER 5 EXTERNAL BUS INTERFACE Figure 5-1. Memory Map When Using External Bus Interface Function (2/3) (c) Memory map of μPD78F1176, 78F1176A FFFFFH Special-function register (SFR) 256 bytes FFF00H FFEFFH General-purpose register 32 bytes FFEE0H FFEDFH RAM 12 KB FCF00H ...
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Figure 5-1. Memory Map When Using External Bus Interface Function (3/3) (e) Memory map of Note Use of the area F8700H to F8EFFH is prohibited when using the self-programming function. Since this area is used for self-programming library. 184 CHAPTER ...
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Registers Controlling External Bus Interface Functions The external bus interface function is controlled by the following two registers. • Peripheral enable register 1 (PER1) • Memory extension mode control register (MEM) • Port mode registers ...
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Memory extension mode control register (MEM) MEM is a register that sets an external extension area. MEM can be set by a 1-bit or 8-bit manipulation instruction. Reset signal generation clears this register to 00H. Figure 5-3. Format of ...
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The function of the external bus interface pins differs depending on the setting of the memory extension mode control register (MEM). MM3 MM2 MM1 MM0 EX35 to EX32 − − − 0 ...
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Setting Port Mode Register and Output Latch Set the port mode register and output latch as follows when using the external bus interface. EXEN MM3 MM2 MM1 MM0 P93/EX35 to P90/EX32 PM9x P9x PM1x P1x PM1x P1x PM7x P7x ...
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Number of Instruction Wait Clocks or Data Access Wait clocks are added to the number of clocks of an instruction when the external bus interface is accessed. The actual number of operating clocks is therefore the sum of the ...
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Number of Instructed Wait Cycles According to External Wait Cycles <R> external device that has a low access speed is accessed, wait cycles can be inserted into the bus cycle Note low-level signal is input ...
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Timing of External Bus Interface Function The functions of the timing control signal output pins in the external memory extension mode are described below. (1) RD pin (alternate function: P64) This pin outputs a read strobe signal when an ...
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Multiplexed bus mode Figure 5-5. Timing to Read External Memory (1/2) (a) No wait, 8-bit bus CLKOUT = f CPU EXE (wait) f CLK CLKOUT ASTB RD AD7 to AD0 A19 to A8 (b) With wait, 8-bit bus CLKOUT ...
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CHAPTER 5 EXTERNAL BUS INTERFACE Figure 5-5. Timing to Read External Memory (2/2) (c) No wait, 16-bit bus CLKOUT = f CPU (Ex.1) CPU (Ex.2) EXE (wait) f CLK CLKOUT ASTB RD AD15 to AD0 A19 to A16 (d) With ...
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Figure 5-6. Timing to Write to External Memory (1/2) (a) No wait, 8-bit bus CLKOUT = f CPU f CLK CLKOUT ASTB WR0 AD7 to AD0 A19 to A8 (b) With wait, 8-bit bus CLKOUT = f CPU EXE (wait) ...
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CHAPTER 5 EXTERNAL BUS INTERFACE Figure 5-6. Timing to Write to External Memory (2/2) (c) No wait, 16-bit bus CLKOUT = f CPU (Ex.1) CPU (Ex.2) EXE (wait) f CLK CLKOUT ASTB WR0 WR1 Hi-Z AD15 to AD0 A19 to ...
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Separate bus mode Figure 5-7. Timing to Read External Memory (1/2) (a) No waits, 8-bit bus CLKOUT = f CPU EXE (wait) f CLK CLKOUT A19 to A0 (b) With wait, 8-bit bus CLKOUT = ...
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CHAPTER 5 EXTERNAL BUS INTERFACE Figure 5-7. Timing to Read External Memory (2/2) (c) No wait, 16-bit bus CLKOUT = f CPU (Ex.1) CPU (Ex.2) EXE (wait) f CLK CLKOUT RD D15 to D0 A19 to A0 (d) With wait, ...
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Figure 5-8. Timing to Write to External Memory (1/2) (a) No wait, 8-bit bus CLKOUT = f CPU f CLK CLKOUT WR0 A19 to A0 (b) With wait, 8-bit bus CLKOUT = f CPU EXE (wait) f ...