UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 626

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

624
(3) Stop condition
Notes 1. Write data to IIC0, not setting WREL0, in order to cancel a wait state during master transmission.
WREL0
INTIIC0
WREL0
INTIIC0
ACKD0
MSTS0
ACKD0
MSTS0
WTIM0
ACKE0
WTIM0
ACKE0
Processing by master device
Transfer lines
Processing by slave device
STD0
SPD0
TRC0
SDA0
STD0
SPD0
TRC0
SPT0
SCL0
SPT0
STT0
STT0
IIC0
IIC0
2. To cancel a slave wait state, write “FFH” to IIC0 or set WREL0.
H
H
H
H
L
L
L
L
L
Transmitting
Receiving
(When 9-Clock Wait Is Selected for Both Master and Slave) (3/3)
IIC0
IIC0
D7
Note 2
Figure 14-28. Example of Master to Slave Communication
1
←
←
FFH Note 2
data Note 1
D6
2
D5
3
CHAPTER 14 SERIAL INTERFACE IIC0
D4
4
User’s Manual U18432EJ5V0UD
D3
5
D2
6
D1
7
D0
8
ACK
9
IIC0
Note 2
←
condition
Stop
FFH Note 2
(When SPIE0 = 1)
(When SPIE0 = 1)
condition
Start
IIC0
AD6
1
←
address
AD5
2