UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 316

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

314
TAU
default
setting
Channel
default
setting
Remark
Sets the TAU0EN bit, TAU1EN bit of the PER0 register to 1.
Sets the TPSm register.
Sets the TMRmn and TMRmp registers of two channels
to be used (determines operation mode of channels).
An interval (period) value is set to the TDRmn register of
the master channel, and a duty factor is set to the
TDRmp register of the slave channel.
Sets slave channel.
When m = 0: n = 0, 2, 4, 6
When m = 1: n = 0, 2
m: Unit number, n: Channel number, p: Slave channel number (p = n+1)
Determines clock frequencies of CKm0 and CKm1.
The TOMmp bit of the TOMm register is set to 1
(combination-operation mode).
Sets the TOLmp bit.
Sets the TOmp bit and determines default level of the
TOmp output.
Sets TOEmp to 1 and enables operation of TOmp.
Clears the port register and port mode register to 0.
Figure 7-61. Operation Procedure When PWM Function Is Used (1/2)
Software Operation
CHAPTER 7 TIMER ARRAY UNIT
User’s Manual U18432EJ5V0UD
Channel stops operating.
(Clock is supplied and some power is consumed.)
Power-off status
Power-on status. Each channel stops operating.
The TOmp pin goes into Hi-Z output state.
The TOmp default setting level is output when the port
mode register is in output mode and the port register is 0.
TOmp does not change because channel stops operating.
The TOmp pin outputs the TOmp set level.
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
Hardware Status