UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 933

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Registers
controlling
serial array
unit
Operation
stop mode
3-wire serial I/O
(CSI00, CSI01,
CSI10, CSI11,
CSI20, CSI21)
communication
UART (UART0,
UART1,
UART2,
UART3)
communication
Function
ISC: Input switch
control register
NFEN0: Noise
filter enable
register 0
Stopping the
operation by
units
Master
transmission
Master transmission
(in continuous
transmission mode)
Master reception After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
Master reception
(in continuous
reception mode)
Master
transmission/
reception
Master
transmission/
reception (in
continuous
transmission/
reception mode)
Slave
transmission
Slave transmission
(in continuous
transmission mode)
Slave reception
Slave
transmission/
reception
Slave
transmission/
reception (in
continuous
transmission/
reception mode)
UART
transmission
Details of
Function
The MDmn0 bit can be rewritten even during operation.
The MDmn0 bit can be rewritten even during operation.
The MDmn0 bit can be rewritten even during operation.
Be sure to clear bits 7 to 2 to “0”.
Be sure to clear bits 7, 5, 3, and 1 to “0”.
If SAUmEN = 0, writing to a control register of serial array unit m is ignored, and,
even if the register is read, only the default value is read (except for input switch
control register (ISC), noise filter enable register (NFEN0), port input mode registers
(PIM0, PIM4, PIM9, PIM12, PIM14), port output mode registers (POM0, POM4,
POM9, POM12, POM14), port mode registers (PM0, PM1, PM4, PM9, PM12, PM14),
and port registers (P0, P1, P4, P9, P12, P14)).
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
However, rewrite it before transfer of the last bit is started, so that it will be rewritten
before the transfer end interrupt of the last transmit data.
clocks have elapsed.
The MDmn0 bit can be rewritten even during operation.
However, rewrite it before receive of the last bit is started, so that it has been
rewritten before the transfer end interrupt of the last receive data.
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
However, rewrite it before transfer of the last bit is started, so that it has been
rewritten before the transfer end interrupt of the last transmit data.
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
The MDmn0 bit can be rewritten even during operation. However, rewrite it before
transfer of the last bit is started.
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
Be sure to set transmit data to the SlOp register before the clock from the master is
started.
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
However, rewrite it before transfer of the last bit is started, so that it will be rewritten
before the transfer end interrupt of the last transmit data.
When using serial array units 0 and 1 as UARTs, the channels of both the
transmitting side (even-number channel) and the receiving side (odd-number
channel) can be used only as UARTs.
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
APPENDIX B LIST OF CAUTIONS
User’s Manual U18432EJ5V0UD
Cautions
451, 453
459, 461
467, 469
476, 478
491, 493
491, 493
505
p.436
p.437
p.441
pp.447
p.452
pp.456,
p.460
pp.464,
p.468
pp.472,
p.477
pp.481,
484
pp.486,
487, 489,
pp.487,
p.492
p.497
pp.501,
(19/35)
931
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