UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 527

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark
300 bps
600 bps
1200 bps
2400 bps
4800 bps
9600 bps
19200 bps
31250 bps
38400 bps
76800 bps
153600 bps
312500 bps
(2) Baud rate error during transmission
(Target Baud Rate)
UART Baud Rate
The baud rate error of UART (UART0, UART1, UART2, UART3) communication during transmission can be
calculated by the following expression. Make sure that the baud rate at the transmission side is within the
permissible baud rate range at the reception side.
Here is an example of setting a UART baud rate at f
(Baud rate error) = (Calculated baud rate value) ÷ (Target baud rate) × 100 − 100 [%]
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
f
f
f
f
f
f
f
f
f
f
f
f
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Operation Clock (MCK)
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
9
8
7
6
5
4
3
3
2
CHAPTER 13 SERIAL ARRAY UNIT
User’s Manual U18432EJ5V0UD
64
64
64
64
64
64
64
39
64
64
64
31
SDRmn[15:9]
CLK
= 20 MHz.
f
CLK
300.48 bps
600.96 bps
1201.92 bps
2403.85 bps
4807.69 bps
9615.38 bps
19230.8 bps
31250.0 bps
38461.5 bps
76923.1 bps
153846 bps
312500 bps
Calculated Baud Rate
= 20 MHz
+0.16 %
+0.16 %
+0.16 %
+0.16 %
+0.16 %
+0.16 %
+0.16 %
±0.0 %
+0.16 %
+0.16 %
+0.16 %
±0.0 %
Error from Target Baud Rate
525