Z8F6401AN020SC00TR Zilog, Z8F6401AN020SC00TR Datasheet - Page 126

• Manufacturer Part Number: Z8F6401AN020SC00TR
• Description: IC ENCORE MCU FLASH 64K 44LQFP
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F6401AN020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F6401AN020SC00T

Table 62. SPI Status Register (SPISTAT)
PS017610-0404
R/W* = Read access. Write a 1 to clear the bit to 0.
RESET
FIELD
ADDR
BITS
R/W
SPI Status Register
R/W*
IRQ
7
0
SPIEN—SPI Enable
0 = SPI disabled.
1 = SPI enabled.
The SPI Status register indicates the current state of the SPI.
IRQ—Interrupt Request
0 = No SPI interrupt request pending.
1 = SPI interrupt request is pending.
OVR—Overrun
0 = An overrun error has not occurred.
1 = An overrun error has been detected.
COL—Collision
0 = A multi-master collision (mode fault) has not occurred.
1 = A multi-master collision (mode fault) has been detected.
Reserved
These bits are reserved and must be 0.
TXST—Transmit Status
0 = No data transmission currently in progress.
1 = Data transmission currently in progress.
SLAS—Slave Select
If SPI enabled as a Slave,
0 = SS input pin is asserted (Low)
1 = SS input is not asserted (High).
If SPI enabled as a Master, this bit is not applicable.
R/W*
OVR
6
0
R/W*
COL
5
0
4
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
F62H
Reserved
3
R
0
2
Serial Peripheral Interface
TXST
R
1
0
Z8 Encore!
SLAS
R
0
1
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