Z8F6401AN020SC00TR Zilog, Z8F6401AN020SC00TR Datasheet - Page 171

• Manufacturer Part Number: Z8F6401AN020SC00TR
• Description: IC ENCORE MCU FLASH 64K 44LQFP
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F6401AN020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F6401AN020SC00T

PS017610-0404
Debug Mode
Figure 88. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (2)
The operating characteristics of the Z8F640x family devices in Debug mode are:
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Entering Debug Mode
The Z8F640x family device enters Debug mode following any of the following opera-
tions:
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Exiting Debug Mode
The device exits Debug mode following any of the following operations:
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RS-232 TX
RS-232 RX
The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to
execute specific instructions.
The system clock operates unless in Stop mode.
All enabled on-chip peripherals operate unless in Stop mode.
Automatically exits Halt mode.
Constantly refreshes the Watch-Dog Timer, if enabled.
Writing the DBGMODE bit in the OCD Control Register to 1 using the OCD interface.
eZ8 CPU execution of a BRK (Breakpoint) instruction (when enabled).
Break upon a Watchpoint match.
If the DBG pin is Low when the Z8F640x family device exits Reset, the On-Chip
Debugger automatically puts the device into Debug mode.
Clearing the DBGMODE bit in the OCD Control Register to 0.
Transceiver
RS-232
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Open-Drain
Buffer
VDD
10K Ohm
DBG Pin
On-Chip Debugger
Z8 Encore!
®
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