Z8F6401AN020SC00TR Zilog, Z8F6401AN020SC00TR Datasheet - Page 62

• Manufacturer Part Number: Z8F6401AN020SC00TR
• Description: IC ENCORE MCU FLASH 64K 44LQFP
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F6401AN020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F6401AN020SC00T

Interrupt Controller
Overview
Interrupt Vector Listing
PS017610-0404
The interrupt controller on the Z8F640x family device prioritizes the interrupt requests
from the on-chip peripherals and the GPIO port pins. The features of the interrupt control-
ler on the Z8F640x family device include the following:
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•
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Interrupt requests (IRQs) allow peripheral devices to suspend CPU operation in an orderly
manner and force the CPU to start an interrupt service routine (ISR). Usually this interrupt
service routine is involved with the exchange of data, status information, or control infor-
mation between the CPU and the interrupting peripheral. When the service routine is com-
pleted, the CPU returns to the operation from which it was interrupted.
The eZ8 CPU supports both vectored and polled interrupt handling. For polled interrupts,
the interrupt control has no effect on operation. Refer to the eZ8 CPU User Manual for
more information regarding interrupt servicing by the eZ8 CPU. The eZ8 CPU User Man-
ual is available for download at www.zilog.com.
Table 22 lists all of the interrupts available on the Z8F640x family device in order of pri-
ority. The interrupt vector is stored with the most significant byte (MSB) at the even Pro-
gram Memory address and the least significant byte (LSB) at the following odd Program
Memory address.
24 unique interrupt vectors:
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–
Flexible GPIO interrupts
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–
3 levels of individually programmable interrupt priority
Watch-Dog Timer can be configured to generate an interrupt
12 GPIO port pin interrupt sources
12 on-chip peripheral interrupt sources
8 selectable rising and falling edge GPIO interrupts
4 dual-edge interrupts
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Interrupt Controller
Z8 Encore!
®
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