Z8F042AHJ020SC00TR Zilog, Z8F042AHJ020SC00TR Datasheet - Page 189

• Manufacturer Part Number: Z8F042AHJ020SC00TR
• Description: IC ENCORE XP MCU FLASH 4K 28SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F042AHJ020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Z8F042AHJ020SC00T

PS022825-0908
Caution:
OCD Unlock Sequence (8-Pin Devices Only)
Breakpoints
High. Because of the open-drain nature of the DBG pin, the host can send a Serial Break to
the OCD even if the OCD is transmitting a character.
Because of pin-sharing on the 8-pin device, an unlock sequence must be performed to
access the DBG pin. If this sequence is not completed during a system reset, then the PA0/
DBG pin functions only as a GPIO pin.
The following sequence unlocks the DBG pin:
1. Hold PA2/RESET Low.
2. Wait 5ms for the internal reset sequence to complete.
3. Send the following bytes serially to the debug pin:
4. Release PA2/RESET. The PA0/DBG pin is now identical in function to that of the
Execution Breakpoints are generated using the BRK instruction (opcode
eZ8 CPU decodes a BRK instruction, it signals the On-Chip Debugger. If Breakpoints are
enabled, the OCD enters DEBUG mode and idles the eZ8 CPU. If Breakpoints are not
enabled, the OCD ignores the BRK signal and the
instruction.
Between
in RESET nor DEBUG mode. If a device has been erased or has not yet been
programmed, all program memory bytes contain
illegal instruction, so some irregular behavior can occur before entering DEBUG mode,
and the register values after entering DEBUG mode differs from their specified reset
values. However, none of these irregularities prevent programming the Flash memory.
Before beginning system debug, it is recommended that some legal code be
programmed into the 8-pin device, and that a RESET occurs.
DBG
DBG
DBG
DBG
DBG
DBG pin on the 20-/28-pin device. To enter DEBUG mode, re-autobaud and write
80H to the OCD control register (see
←
←
←
←
←
80H (autobaud)
EBH
5AH
70H
CDH (32-bit unlock key)
Step 3
and
Step
4, there is an interval during which the 8-pin device is neither
On-Chip Debugger Commands
BRK
FFH
Z8 Encore! XP
instruction operates as an NOP
. The CPU interprets this as an
Product Specification
®
00H
On-Chip Debugger
on page 179).
F082A Series
). When the
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