Z8F042AHJ020SC00TR Zilog, Z8F042AHJ020SC00TR Datasheet - Page 211

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Z8F042AHJ020SC00TR

Manufacturer Part Number
Z8F042AHJ020SC00TR
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F042AHJ020SC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8F042AHJ020SC00T
Assembly Language Syntax
eZ8 CPU Instruction Notation
PS022825-0908
For proper instruction execution, eZ8 CPU assembly language syntax requires that the
operands be written as ‘destination, source’. After assembly, the object code usually has
the operands in the order ‘source, destination’, but ordering is opcode-dependent. The
following instruction examples illustrate the format of some basic assembly instructions
and the resulting object code produced by the assembler. This binary format must be
followed if manual program coding is preferred or if you intend to implement your own
assembler.
Example 1: If the contents of Registers 43H and 08H are added and the result is stored in
43H, the assembly syntax and resulting object code is:
Table 112. Assembly Language Syntax Example 1
Example 2: In general, when an instruction format requires an 8-bit register address, that
address can specify any register location in the range 0–255 or, using Escaped Mode
Addressing, a Working Register R0–R15. If the contents of Register 43H and Working
Register R8 are added and the result is stored in 43H, the assembly syntax and resulting
object code is:
Table 113. Assembly Language Syntax Example 2
See the device-specific Product Specification to determine the exact register file range
available. The register file size varies, depending on the device type.
In the eZ8 CPU Instruction Summary and Description sections, the operands, condition
codes, status flags, and address modes are represented by a notational shorthand that is
described in
Assembly Language
Code
Object Code
Assembly Language
Code
Object Code
Table
114.
ADD
04
ADD
04
43H,
08
43H,
E8
08H
43
R8
43
Z8 Encore! XP
(ADD dst, src)
(OPC src, dst)
(ADD dst, src)
(OPC src, dst)
Product Specification
eZ8 CPU Instruction Set
®
F082A Series
200

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