Z8F042AHJ020SC00TR Zilog, Z8F042AHJ020SC00TR Datasheet - Page 50

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Z8F042AHJ020SC00TR

Manufacturer Part Number
Z8F042AHJ020SC00TR
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F042AHJ020SC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8F042AHJ020SC00T
Direct LED Drive
Shared Reset Pin
Shared Debug Pin
PS022825-0908
Caution:
Caution:
PA0 and PA6 contain two different timer functions, a timer input and a complementary
timer output. Both of these functions require the same GPIO configuration, the selection
between the two is based on the timer mode. See
The Port C pins provide a current sinked output capable of driving an LED without
requiring an external resistor. The output sinks current at programmable levels of 3 mA, 7
mA, 13 mA and 20 mA. This mode is enabled through the Alternate Function sub-register
AFS1 and is programmable through the LED control registers. The LED Drive Enable
(LEDEN) register turns on the drivers. The LED Drive Level (LEDLVLH and LEDLVLL)
registers select the sink current.
For correct function, the LED anode must be connected to V
GPIO pin. Using all Port C pins in LED drive mode with maximum current may result in
excessive total current. See
current for the applicable package.
On the 20- and 28-pin devices, the PD0 pin shares function with a bi-directional reset pin.
Unlike all other I/O pins, this pin does not default to GPIO function on power-up. This pin
acts as a bi-directional reset until the software re-configures it. The PD0 pin is output-only
when in GPIO mode.
On the 8-pin product versions, the reset pin is shared with PA2, but the pin is not limited to
output-only when in GPIO mode.
On the 8-pin version of this device only, the Debug pin shares function with the PA0 GPIO
pin. This pin performs as a general purpose input pin on power-up, but the debug logic
monitors this pin during the reset sequence to determine if the unlock sequence occurs. If
the unlock sequence is present, the debug function is unlocked and the pin no longer func-
For pin with multiple alternate functions, it is recommended to write to the AFS1 and
AFS2 sub-registers before enabling the alternate function via the AF sub-register. This
prevents spurious transitions through unwanted alternate function modes.
If PA2 on the 8-pin product is reconfigured as an input, ensure that no external
stimulus drives the pin low during any reset sequence. Since PA2 returns to its RESET
alternate function during system resets, driving it Low holds the chip in a reset state un-
til the pin is released.
Electrical Characteristics
Timers
on page 221 for the maximum total
Z8 Encore! XP
on page 69 for more details.
DD
General-Purpose Input/Output
and the cathode to the
Product Specification
®
F082A Series
39

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